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參數(shù)資料
| 型號： | MX53L06402L-50 |
| 廠商： | MACRONIX INTERNATIONAL CO LTD |
| 元件分類： | PROM |
| 英文描述： | FLASH 2.7V PROM CARD, XMA7 |
| 封裝： | CRAD-7 |
| 文件頁數(shù)： | 53/55頁 |
| 文件大?。?/td> | 262K |
| 代理商： | MX53L06402L-50 |
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7
P/N: PM1043
REV. 1.0, NOV. 25, 2003
MX53L06402
5.2 Relative card address (RCA)
The 16-bit relative card address register carries the card address assigned by the host during the card identification.
This address is used for the addressed host to card communication after the card identification procedure. The default
value of the RCA register is 0x0001. The value 0x0000 is reserved to set all cards in Standby State with the command
SELECT_DESELECT_CARD (CMD7).
The RCA is programmed with the command SET_RELATIVE_ADDRESS (CMD3) during the initialization procedure.
The content of this register is lost after power down. The default value is assigned when an internal reset is applied
by the power up detection unit of the MX53L06402.
5.3 Card specific data (CSD)
The card specific data register describes how to access the card content. The CSD defines the data format, error
correction type, maximum data access time, data transfer speed etc.
CSD-slice
Width
Value
Field
[127:126]
2
CSD_STRUCTURE
[125:122]
4
3
SPEC_VERS
[121:120]
2
don't care
_
[119:112]
8
0x0E(1ms)
TAAC
[111:104]
8
0x01(100 cycles)
NSAC
[103:96]
8
0x2A(20 Mbit/s)
TRAN_SPEED
[95:84]
12
0x007 (class 0,1,2)
CCC
[83:80]
4
0x9 (512 bytes)
READ_BLK_LEN
[79:79]
1
"1"
READ_BLK_PARTIAL
[78:78]
1
don't care
WRITE_BLK_MISALIGN
[77:77]
1
"1"
READ_BLK_MISALIGN
[76:76]
1
"0"
DSR_IMP
[75:74]
2
don't care
-
[73:62]
12
0xFFE
C_SIZE
[61:59]
3
0x4(25mA)
VDD_R_CURR_MIN
[58:56]
3
0x4(35mA)
VDD_R_CURR_MAX
[55:53]
3
don't care
VDD_W_CURR_MIN
[52:50]
3
don't care
VDD_W_CURR_MAX
[49:47]
3
0x3
C_SIZE_MULT
[46:42]
5
don't care
ERASE_GRP_SIZE
[41:37]
5
don't care
ERASE_GRP_MULT
[36:32]
5
don't care
WP_GRP_SIZE
[31:31]
1
don't care
WP_GRP_ENABLE
[30:29]
2
don't care
DEFAULT_ECC
[28:26]
3
don't care
R2W_FACTOR
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
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