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參數(shù)資料
| 型號： | MX53L06402L-50 |
| 廠商： | MACRONIX INTERNATIONAL CO LTD |
| 元件分類： | PROM |
| 英文描述： | FLASH 2.7V PROM CARD, XMA7 |
| 封裝： | CRAD-7 |
| 文件頁數(shù)： | 24/55頁 |
| 文件大?。?/td> | 262K |
| 代理商： | MX53L06402L-50 |
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30
P/N: PM1043
REV. 1.0, NOV. 25, 2003
MX53L06402
7.5.3 Data Read
The SPI mode supports single block read operations only (CMD17 in the MultiMediaCard protocol). Upon reception
of a valid read command the card will respond with a response token followed by a data token of the length defined
in a previous SET_BLOCKLEN (CMD16) command (refer to Figure 14).
DataIn
DataOut
command
from host
to card
from card
to host
data from card
to host
Next
command
response
data block CRC
Figure 14:Read Operation
A valid data block is suffixed with a 16-bit CRC generated by the standard CCITT polynomial x 16 +x 12 +x 5 +1.
The maximum block length is given by READ_BL_LEN, defined in the CSD. If partial blocks are allowed (i.e. the CSD
parameter READ_BL_PARTIAL equals 1), the block length can be any number between 1 and the maximum block
size. Otherwise, the only valid block length for data read is given by READ_BL_LEN.
The start address can be any byte address in the valid address range of the card.
In case of a data retrieval error, the card will not transmit any data. Instead, a special data error token will be sent to
the host. Figure 15 shows a data read operation which terminated with an error token rather than a data block.
DataIn
DataOut
command
from host
to card
from card
to host
data error token
from card to host
Next
command
response
data error
Figure 15:Read Operation- Data Error
7.5.4 Read CID/CSD Registers
Unlike the MultiMediaCard protocol (where the register contents is sent as a command response), reading the
contents of the CSD and CID registers in SPI mode is a simple read-block transaction. The card will respond with a
standard response token (see Figure 14) followed by a data block of 16 bytes suffixed with a 16 bit CRC.
The data time out for the CSD command cannot be set to the card TAAC since this value is stored in the CSD.
Therefore, the standard response time-out value (N
CR ) is used for read latency of the CSD register.
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