參數(shù)資料
型號(hào)： MT9300B
廠商： Mitel Networks Corporation
英文描述： Multi-Channel Voice Echo Canceller(多通道話音回聲消除器)
中文描述： 多通道語(yǔ)音回聲消除器（多通道話音回聲消除器）
文件頁(yè)數(shù)： 13/37頁(yè)
文件大?。?/td> 179K
代理商： MT9300B
Advance Information
MT9300B
13
Extended Delay Configuration
For a given group (group 0 to 15), only one PCM I/O
channel is active (Echo Canceller A) and the other
channel carries don’t care data. For example, group
2, Echo Canceller A (Channel 4) will be active and
Echo Canceller B (Channel 5) will carry don’t care
data.
Back-to-Back Configuration
For a given group (group 0 to 15), only one PCM I/O
channel is active (Echo Canceller A) and the other
channel carries don’t care data. For example, group
5, Echo Canceller A (Channel 10) will be active and
Echo Canceller B (Channel 11) will carry don’t care
data.
Power Up Sequence
On power up, the RESET pin must be held low for
100
μ
s. Forcing the RESET pin low will put the
MT9300B in power down state. In this state, all
internal clocks are halted, D<7:0>, Sout, Rout, DTA
and IRQ pins are tristated. The 16 Main Control
Registers, the Interrupt FIFO Register and the Test
Register are reset to zero.
When the RESET pin returns to logic high and a
valid MCLK is applied, the user must wait 500
μ
s for
PLL to lock. C4i and F0i can be active during this
period. Once the PLL has locked, the user must
power
up
the
16
groups
individually, by writing a “1” into the PWUP bit in
each
group
of
echo
canceller’s
Register.
of
echo
cancellers
Main
Control
For each group of echo cancellers, when the PWUP
bit toggles from zero to one, echo cancellers A and B
execute their initialization routine. The initialization
routine sets their registers, Base Address+00
H
to
Base Address+3F
H
, to the default Reset Value and
clears the Adaptive Filter coefficients. Two frames
are necessary for the initialization routine to execute
properly.
Once the initialization routine is executed, the user
can set the per channel Control Registers, Base
Address+00
H
to Base Address+3F
H
, for the specific
application.
Power management
Each group of echo cancellers can be placed in
Power Down mode by writing a “0” into the PWUP bit
in their respective Main Control Register. When a
given
group
is
in
Power
corresponding PCM data are bypassed from Rin to
Rout and from Sin to Sout with two frames delay.
Refer to the Main Control Register section for
description.
Down
mode,
the
The typical power consumption can be calculated
with the following equation:
P
C
= 60 * Nb_of_groups + 40, in mW
where 0
≤
Nb_of_groups
≤
16
Call Initialization
To ensure fast initial convergence on a new call, it is
important to clear the Adaptive filter. This is done by
putting the echo canceller in bypass mode for at
least
one
frame
(125
adaptation.
μ
s)
and
then
enabling
Interrupts
The MT9300B provides an interrupt pin (IRQ) to
indicate to the HOST processor when a G.164 or
G.165 Tone Disable is detected and released.
Although the MT9300B may be configured to react
automatically to tone disable status on any input
PCM voice channels, the user may want for the
external HOST processor to respond to Tone Disable
information in an appropriate, application specific
manner.
Each echo canceller will generate an interrupt when
a Tone Disable occurs and will generate another
interrupt when a Tone Disable releases.
Group
Channel
Group
Channel
0
0, 1
8
16, 17
1
2, 3
9
18, 19
2
4, 5
10
20, 21
3
6, 7
11
22, 23
4
8, 9
12
24, 25
5
10, 11
13
26, 27
6
12, 13
14
28, 29
7
14, 15
15
30, 31
Table 2 - Group and Channel allocation
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參數(shù)描述
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MT9300BV 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:Multi-Channel Voice Echo Canceller
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