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參數(shù)資料
| 型號(hào)： | MT90520 |
| 廠商： | Zarlink Semiconductor Inc. |
| 英文描述： | 8-Port Primary Rate Circuit Emulation AAL1 SAR |
| 中文描述： | 8端口基本速率電路仿真AAL1特區(qū) |
| 文件頁(yè)數(shù)： | 177/180頁(yè) |
| 文件大?。?/td> | 1736K |
| 代理商： | MT90520 |
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MT90520
Data Sheet
177
Zarlink Semiconductor Inc.
Plesiochronous -
The temporal property of being arbitrarily close in frequency to some defined precision.
Plesiochronous signals occur at nominally the same rate, any variation in rate being constrained within specific
limits. Since they are not identical, over the long term they will be skewed from each other. This will force a switch to
occasionally repeat or delete data in order to handle buffer underflow or overflow. (In telecommunications, this is
known as a frame slip.)
PTI -
Payload Type Identifier
; 3-bit field in the ATM cell header - MSB indicates if the cell contains
OAM
information
or user data.
QoS -
Quality of Service
; ATM performance parameters that characterize the transmission quality over a given
VCC (e.g., cell delay variation; cell transfer delay, cell loss ratio).
RTS -
Residual Time Stamp; see
SRTS
.
SAR -
Segmentation and Reassembly
; method of partitioning, at the source, frames into ATM cells and
reassembling, at the destination, these cells back into information frames; lower sublayer of the
AAL
which inserts
data from the information frames into cells and then adds the required header, trailer, and/or padding bytes to
create 48-byte payloads to be transmitted to the ATM layer.
SDT -
Structured Data Transfer
; format used within
AAL1
for blocks consisting of Nx64 kbps channels; blocks are
segmented into cells for transfer and additional overhead bytes (pointers) are used to indicate structure boundaries
within cells (therefore aiding data recovery).
SN -
Sequence Number
; 4-bit field in the
AAL1
header byte used as a sequence counter for detecting lost or
misinserted ATM cells.
SNP -
Sequence Number Protection
; 4-bit field in the
AAL1
header byte consisting of a 3-bit CRC and a parity bit
which are designed to provide error-correction on the
SN
.
SRTS -
Synchronous Residual Time Stamp
; method for clock recovery in which difference signals between a
source clock and the network reference clock (time stamps) are transmitted to allow reconstruction of the source
clock. The destination reconstructs the source clock based on the time stamps and the network reference clock.
(Note that the same network reference clock is required at both ends.)
Synchronous -
1. The temporal property of being sourced from the same timing reference. Synchronous signals
have the same frequency, and a fixed (often implied to be zero) phase offset. 2. A mode of transmission in which
the sending and receiving terminal equipment are operating continually at the same rate and are maintained in a
desired phase relationship by an appropriate means.
UDT -
Unstructured Data Transfer
; format used within
AAL1
for transmission of user data without regard for
structure boundaries (e.g., circuit emulation).
UTOPIA -
Universal Test and Operations Physical Interface for ATM
; a
PHY
-level interface to provide connectivity
between ATM components.
VC -
Virtual Channel
(also,
Virtual Circuit
); one of several logical connections defined within a virtual path (
VP
)
between two ATM devices; provides sequential, unidirectional transport of ATM cells.
VCC -
Virtual Circuit Connection;
term used to include both
VPI
and
VCI
.
VCI -
Virtual Channel Identifier
; 16-bit value in the ATM cell header that provides a unique identifier for the virtual
channel (
VC
) within a virtual path (
VP
) that carries a particular cell.
VP
-
Virtual Path
; a unidirectional logical connection between two ATM devices; consists of a set of virtual channels
(
VC
).
VPI -
Virtual Path Identifier
; 8-bit value (in UNI; 12 bits in NNI) in the ATM cell header that indicates the virtual path
(
VP
) to which a cell belongs.
VTOA -
Voice and Telephony over ATM
; intended to provide voice connectivity to the desktop, and to provide
interoperability with existing N-ISDN and PBX services.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MT90520AG | 8-Port Primary Rate Circuit Emulation AAL1 SAR |
| MT9072 | Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 |
| MT9072AB | Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 |
| MT9072AV | Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 |
| MT90820 | Large Digital Switch |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MT90520AG | 制造商:Microsemi Corporation 功能描述:ATM SAR 2.048MBPS 2.5V CBR 456BGA - Trays |
| MT90520AG2 | 制造商:Microsemi Corporation 功能描述:ATM SAR 2.048MBPS 2.5V CBR 456BGA - Trays 制造商:Zarlink Semiconductor Inc 功能描述:ATM SAR 2.048MBPS 2.5V CBR 456BGA - Trays |
| MT90528 | 制造商:ZARLINK 制造商全稱(chēng):Zarlink Semiconductor Inc 功能描述:28-Port Primary Rate Circuit Emulation AAL1 SAR |
| MT90528AG | 制造商:ZARLINK 制造商全稱(chēng):Zarlink Semiconductor Inc 功能描述:28-Port Primary Rate Circuit Emulation AAL1 SAR |
| MT90528AG2 | 制造商:ZARLINK 制造商全稱(chēng):Zarlink Semiconductor Inc 功能描述:28-Port Primary Rate Circuit Emulation AAL1 SAR |
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