參數(shù)資料
型號: MT55L1MY18P
廠商: Micron Technology, Inc.
英文描述: 16Mb: 1 Meg x 18, Flow-Through ZBT SRAM(16Mb流通式同步靜態(tài)存儲器)
中文描述: 16Mb的:1梅格× 18,流量通過ZBT SRAM的(16Mb的流通式同步靜態(tài)存儲器)
文件頁數(shù): 18/34頁
文件大?。?/td> 460K
代理商: MT55L1MY18P
18
16Mb: 1 Meg x 18, 512K x 32/36 Pipelined ZBT SRAM
MT55L1M18P_2.p65 – Rev. 8/00
Micron Technology, Inc., reserves the right to change products or specifications without notice.
2000, Micron Technology, Inc.
ADVANCE
16Mb: 1 MEG x 18, 512K x 32/36
PIPELINED ZBT SRAM
NOTE:
1. If V
DD
= +3.3V, then V
DD
Q = +3.3V or +2.5V. If V
DD
= +2.5V, then V
DD
Q = +2.5V.
Voltage tolerances: +3.3V ±0.165 or +2.5V ±0.125V for all values of V
DD
and V
DD
Q.
2. I
DD
is specified with no output current and increases with faster cycle times. I
DD
Q increases with faster cycle times and
greater output loading.
3. “ Device deselected” means device is in a deselected cycle as defined in the truth table. “ Device selected” means device
is active (not in deselected mode).
4. Typical values are measured at 3.3V, 25oC and 10ns cycle time.
I
DD
OPERATING CONDITIONS AND MAXIMUM LIMITS
(Note 1) (0oC
T
A
+70oC)
DESCRIPTION
Power Supply
Current:
Operating
Power Supply
Current: Idle
CONDITIONS
SYMBOL
TYP
-6
-7.5
-10
UNITS
NOTES
Device selected; All inputs
V
IL
or
3
V
IH
; Cycle time
3
t
KC (MIN);
V
DD
= MAX; Outputs open
Device selected; V
DD
= MAX;
CKE#
3
V
IH
;
All inputs
V
SS
+ 0.2 or
3
V
DD
- 0.2;
Cycle time
3
t
KC (MIN)
Device deselected; V
DD
= MAX;
All inputs
V
SS
+ 0.2 or
3
V
DD
- 0.2;
All inputs static; CLK frequency = 0
Device deselected; V
DD
= MAX;
All inputs
V
IL
or
3
V
IH
;
All inputs static; CLK frequency = 0
Device deselected; V
DD
= MAX;
ADV/LD#
3
V
IH
; All inputs
V
SS
+ 0.2
or
3
V
DD
- 0.2; Cycle time
3
t
KC (MIN)
ZZ
3
V
IH
I
DD
TBD
475
425
325
mA
2, 3, 4
I
DD
1
TBD
32
29
24
mA
2, 3, 4
CMOS Standby
I
SB
2
TBD
10
10
10
mA
3, 4
TTL Standby
I
SB
3
TBD
25
25
25
mA
3, 4
Clock Running
I
SB
4
TBD
120
105
75
mA
3, 4
Snooze Mode
I
SB
2
Z
TBD
10
10
10
mA
4
MAX
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