
502
42073A-MCU Wireless-02/13
ATmega2564/1284/644RFR2
31 Memory Programming
31.1 Program And Data Memory Lock Bits
The ATmega2564/1284/644RFR2 provides six Lock bits which can be left un-
programmed (“1”) or can be programmed (“0”) to obtain the additional features listed in
command.
Table 31-1. Lock Bit Byte
(1)
Lock Bit Byte
Bit No
Description
Default Value
7
1 (un-programmed)
6
1 (un-programmed)
BLB12
5
Boot Lock bit
1 (un-programmed)
BLB11
4
Boot Lock bit
1 (un-programmed)
BLB02
3
Boot Lock bit
1 (un-programmed)
BLB01
2
Boot Lock bit
1 (un-programmed)
LB2
1
Lock bit
1 (un-programmed)
LB1
0
Lock bit
1 (un-programmed)
Note:
1. “1” means un-programmed, “0” means programmed.
Table 31-2. Lock Bit Protection Modes
(0)(0)
Memory Lock Bits
Protection Type
LB Mode
LB2
LB1
1
No memory lock features enabled.
2
1
0
Further programming of the Flash and EEPROM is
disabled in Parallel, JTAG and Serial Programming
mode. The Fuse bits are locked in Parallel, JTAG and
Serial Programming mode.
(0)
3
0
Further programming and verification of the Flash and
EEPROM is disabled in Parallel, JTAG and Serial
Programming mode. The Boot Lock bits and Fuse bits
are locked in Parallel, JTAG and Serial Programming
mode.
(0)
BLB0 Mode
BL02
BL01
1
No restrictions for SPM or (E)LPM accessing the
Application section.
2
1
0
SPM is not allowed to write to the Application section.
3
0
SPM is not allowed to write to the Application section,
and (E)LPM executing from the Boot Loader section
is not allowed to read from the Application section. If
Interrupt Vectors are placed in the Boot Loader
section, interrupts are disabled while executing from
the Application section.
4
0
1
(E)LPM executing from the Boot Loader section is not
allowed to read from the Application section. If
Interrupt Vectors are placed in the Boot Loader
section, interrupts are disabled while executing from
the Application section.