
111
42073A-MCU Wireless-02/13
ATmega2564/1284/644RFR2
Bit 1:0 – Res1:0 - Reserved Bit
These bits are reserved for future use. The result of a read access is undefined. The
register bits must always be written with the reset value.
9.12.2 AES_STATUS – AES Status Register
Bit
7
6
5
4
3
2
1
0
NA ($13D)
AES_ER
Res5
Res4
Res3
Res2
Res1
Res0
AES_DONE AES_STATUS
Read/Write
R
Initial Value
0
This read-only register signals the status of the security module and operation. Note
that the AES_STATUS register is cleared when entering the radio transceiver SLEEP
state.
Bit 7 – AES_ER - AES Operation Finished with Error
This register bit indicates an error during AES module run. An error occurs if accessing
AES_CTRL while an AES operation is running or if AES_KEY or AES_STATE Memory
is not loaded completely or less than 16 Byte read from AES_STATE.
Bit 6:1 – Res5:0 - Reserved
These bits are reserved for future use.
Bit 0 – AES_DONE - AES Operation Finished with Success
This register bit indicates a successfully finished operation of the AES module.
9.12.3 AES_STATE – AES Plain and Cipher Text Buffer Register
Bit
7
6
5
4
3
2
1
0
NA ($13E)
AES_STATE7:0
AES_STATE
Read/Write
RW
Initial Value
0
The AES_STATE register accesses a 16 byte internal data buffer. The buffer is
accessed by reading or writing 16 times to the same address location (AES_STATE). If
the buffer is not completely read or written an error occurs when an AES operation is
started. Note that the AES_STATE register is cleared when entering the radio
transceiver SLEEP state.
Bit 7:0 – AES_STATE7:0 - AES Plain and Cipher Text Buffer
These bits represent the data buffer for the AES operation.
9.12.4 AES_KEY – AES Encryption and Decryption Key Buffer Register
Bit
7
6
5
4
3
2
1
0
NA ($13F)
AES_KEY7:0
AES_KEY
Read/Write
RW
Initial Value
0