
468
42073A-MCU Wireless-02/13
ATmega2564/1284/644RFR2
Bits 7:0 – ADC7D:ADC0D: Digital Input Disable
When this bit is written logic one, the digital input buffer on the corresponding ADC pin
is disabled. The corresponding PIN Register bit will always read as zero when this bit is
set. When an analog signal is applied to the ADC7:0 pin and the digital input from this
pin is not needed, this bit should be written logic one to reduce power consumption in
the digital input buffer.
27.12.7 DIDR2 – Digital Input Disable Register 2
Bit
7
6
5
4
3
2
1
0
NA ($7D)
ADC15D ADC14D ADC13D ADC12D ADC11D ADC10D
ADC9D
ADC8D
DIDR2
Read/Write
RW
Initial Value
0
Reserved for future use.
Bit 7:0 – ADC15D:ADC8D - Reserved Bits
This bit is reserved for future use. For ensuring compatibility with future devices, this bit
must be written to zero.
27.12.8 BGCR – Reference Voltage Calibration Register
Bit
7
6
5
4
NA ($67)
Res
BGCAL_FINE3
BGCAL_FINE2
BGCAL_FINE1
BGCR
Read/Write
R
RW
Initial Value
0
Bit
3
2
1
0
NA ($67)
BGCAL_FINE0
BGCAL2
BGCAL1
BGCAL0
BGCR
Read/Write
RW
Initial Value
0
This register contains the calibration values of the reference voltage of the ADC. The
values are loaded from the fuse memory after power-up. They can be corrected by the
application software e.g. to compensate for temperature changes. The internal 1.6V
reference voltage is calibrated and has therefore the highest accuracy compared to the
1.5V or AVDD reference.
Bit 7 – Res - Reserved Bit
This bit is reserved for future use. A read access always will return zero. A write access
does not modify the content.
Bit 6:3 – BGCAL_FINE3:0 - Fine Calibration Bits
These bits allow the calibration of the AREF voltage with a resolution of 2mV.
Table 27-15 BGCAL_FINE Register Bits
Register Bits
Value
Description
BGCAL_FINE3:0
0
Center value
1
Voltage step up
8
Voltage step down