
461
42073A-MCU Wireless-02/13
ATmega2564/1284/644RFR2
The A/D conversion result will always be a positive number for both VDRTBBP and
VDRTBBN. The SRAM supply voltage is easily calculated according to the following
)
(
,
DRTBBN
DRTBBP
DD
DRT
SRAM
DD
V
+
=
with a GAIN of 0.5. It is not possible to read both VDRTBBP and VDRTBBN at the same time.
However the time required for the A/D conversion is short compared to the time
constant of a DRT voltage change.
27.11 EVDD Voltage Measurement
A dedicated, internal, single-ended input channel is available
(1) to measure the EVDD
supply voltage directly with the A/D converter. This feature is a supplement to observing
The EVDD supply voltage is internally divided by three with a resistor. The typical, total
resistor value is 120 k. Hence when activating the EVDD measurement channel,
EVDD is loaded with an additional current. Deselect the EVDD measurement channel
after completion of the A/D conversion. It is important to allow a sufficient high tracking
time for full settling of the ADC input voltage due to the attached RC time constant of
this input channel. The following table summarizes the preferred setup of the EVDD
voltage measurement:
Table 27-10. Recommended ADC Setup for EVDD Voltage Measurements
Parameter
Register
Recommended Setup
ADC Channel
ADMUX,
ADCSRB
Select MUX4:0 = 00110 to measure VDRTBBP;
MUX5 = 1;
ADC Clock
ADCSRA
Select a clock frequency of 1 MHz or lower;
VREF
ADMUX
Select the internal 1.6V reference voltage;
Start-up time
ADCSRC
Standard requirement of 20 s is sufficient;
Tracking time
ADCSRC
Value depends on ADC Clock, a minimum of 4 s is required;
The A/D conversion result ADCEVDD will always be a positive number (single-ended
conversion). The input voltage VIN of the converter is easily derived by:
VIN = 1/3 VEVDD
conversion result.