
463
42073A-MCU Wireless-02/13
ATmega2564/1284/644RFR2
Bit 6 – ACME: Analog Comparator Multiplexer Enable
Bit 5 – REFOK: Reference Voltage OK
The status of the internal generated reference voltage can be monitored through this
bit. Setting the ADEN bit in register ADCSRA will enable the reference voltage for the
ADC according to the REFSn bits in the ADMUX register. The reference voltage will be
available after a start-up delay. A REFOK value of 1 indicates that the internal
generated reference voltage is approaching final levels.
Bit 4 – ACCH: Analog Channel Change
The user can force a reset of the analog blocks by setting this bit to 1 without
requesting a different channel. The analog blocks of the ADC will be reset to handle
possible new voltage ranges. Such a reset phase is especially important for the gain
amplifier. It could be temporarily disabled by a large step of its input common voltage
leading to erroneous A/D conversion results. ACCH will read as one until the reset
phase of the analog blocks can be entered.
Bit 3 – MUX5: Analog Channel and Gain Selection Bit
This bit is used together with MUX4:0 in ADMUX to select the analog input signals
connected to the ADC. See the following table for details. If this bit is changed during a
conversion, the change will not go in effect until this conversion is complete. Note that
the MUX5 bit is internally buffered and a write access to the MUX4:0 bits is required to
Table 27-12. Input Channel Selections
MUX5:0
Single Ended
Input
Positive Differential
Input
Negative Differential
Input
Gain
000000
ADC0
N/A
000001
ADC1
000010
ADC2
000011
ADC3
000100
ADC4
000101
ADC5
000110
ADC6
000111
ADC7
001000
N/A
ADC0
10x
001001
ADC1
ADC0
10x
001010
ADC0
200x
001011
ADC1
ADC0
200x
001100
ADC2
10x
001101
ADC3
ADC2
10x
001110
ADC2
200x
001111
ADC3
ADC2
200x
010000
N/A
ADC0
ADC1
1x
010001
ADC1
1x
010010
ADC2
ADC1
1x
010011
ADC3
ADC1
1x