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42073A-MCU Wireless-02/13
ATmega2564/1284/644RFR2
the IN and OUT instructions. For the Extended I/O space from $060 – $1FF in SRAM,
only the ST/STS/STD and LD/LDS/LDD instructions can be used.
The first Data Memory locations address both the Register File, the I/O Memory,
Extended I/O Memory, and the internal data SRAM. The first 32 locations address the
Register file, the next 64 location the standard I/O Memory, then 416 locations of
Extended I/O memory and the following locations address the internal data SRAM.
The five different addressing modes for the data memory cover: Direct, Indirect with
Displacement, Indirect, Indirect with Pre-decrement, and Indirect with Post-increment.
In the Register file, registers R26 to R31 feature the indirect addressing pointer
registers.
The direct addressing reaches the entire data space.
The Indirect with Displacement mode reaches 63 address locations from the base
address given by the Y- or Z-register.
When using register indirect addressing modes with automatic pre-decrement and post-
increment, the address registers X, Y, and Z are decremented or incremented.
The 32 general purpose working registers, 64 I/O registers, and the internal data SRAM
(SRAM_SIZE Bytes) in the ATmega2564/1284/644RFR2 are all accessible through all
Figure 8-7. Data Memory Map
32 Registers
64 I/O Registers
Internal SRAM
(32K/16K/8K x 8)
$0000 - $001F
$0020 - $005F
$21FF
$41FF
$81FF
$FFFF
$0060 - $01FF
Data Memory
416 Ext I/O Reg.
$0200
8.2.1 Data Memory Access Times
This section describes the general access timing concepts for internal memory access.
Access to the internal data SRAM is performed in two clkCPU cycles as described in