
354
42073A-MCU Wireless-02/13
ATmega2564/1284/644RFR2
Table 21-6. Asynchronous clock selection for Timer/Counter2 and Symbol-Counter
AS2
EXCLK
EXCLKAMR
Timer/Counter2
clock source
32 kHz crystal Osc.
(TOSC1/TOSC2)
PG2, PG3, PG4
as GPIOs
0
clkI/O
off
PG2, PG3, PG4
0
1
0
not defined
1
0
32 kHz crystal Osc
on
PG2
1
0
TOSC1 (PG4)
off
PG2, PG3
0
1
clkI/O
off
PG2, PG3, PG4
0
1
not defined
1
0
1
AMR (PG2)
on
1
AMR (PG2)
off
PG3, PG4
21.11 Register Description
21.11.1 TIMSK2 – Timer/Counter Interrupt Mask register
Bit
7
6
5
4
3
2
1
0
NA ($70)
Res4
Res3
Res2
Res1
Res0
OCIE2B
OCIE2A
TOIE2
TIMSK2
Read/Write
R
RW
Initial Value
0
Bit 7:3 – Res4:0 - Reserved Bit
This bit is reserved for future use. A read access always will return zero. A write access
does not modify the content.
Bit 2 – OCIE2B - Timer/Counter2 Output Compare Match B Interrupt Enable
When the OCIE2B bit is written to one and the I-bit in the Status Register is set (one),
the Timer/Counter2 Compare Match B interrupt is enabled. The corresponding interrupt
is executed if a compare match in Timer/Counter2 occurs, i.e., when the OCF2B bit is
set in the Timer/Counter2 Interrupt Flag Register TIFR2.
Bit 1 – OCIE2A - Timer/Counter2 Output Compare Match A Interrupt Enable
When the OCIE2A bit is written to one and the I-bit in the Status Register is set (one),
the Timer/Counter2 Compare Match A interrupt is enabled. The corresponding interrupt
is executed if a compare match in Timer/Counter2 occurs, i.e., when the OCF2A bit is
set in the Timer/Counter2 Interrupt Flag Register TIFR2.
Bit 0 – TOIE2 - Timer/Counter2 Overflow Interrupt Enable
When the TOIE2 bit is written to one and the I-bit in the Status Register is set (one), the
Timer/Counter2 Overflow interrupt is enabled. The corresponding interrupt is executed
if an overflow in Timer/Counter2 occurs i.e., when the TOV2 bit is set in the
Timer/Counter2 Interrupt Flag Register TIFR2.
21.11.2 TIFR2 – Timer/Counter Interrupt Flag Register
Bit
7
6
5
4
3
2
1
0
$17 ($37)
Res4
Res3
Res2
Res1
Res0
OCF2B
OCF2A
TOV2
TIFR2
Read/Write
R
RW
Initial Value
0