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參數(shù)資料
| 型號： | MK50H27Q25 |
| 廠商： | STMICROELECTRONICS |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 1 CHANNEL(S), 51M bps, SERIAL COMM CONTROLLER, PQCC52 |
| 封裝： | PLASTIC, LCC-52 |
| 文件頁數(shù)： | 7/58頁 |
| 文件大?。?/td> | 621K |
| 代理商： | MK50H27Q25 |
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CSR
DATA
1
5
1
0
1
4
0
9
1
2
1
0
8
0
3
0
7
0
2
0
6
0
5
0
4
0
1
0
1
3
4.1.1.2 Register Data Port (RDP)
BIT
NAME
DESCRIPTION
15:00
CSR DATA
Writing data to the RDP loads data into the CSR selected by RAP. Reading the data from
RDP reads the data from the CSR selected in RAP.
4.1.2 Control and Status Register Definition
4.1.2.1 Control and Status Register 0 (CSR0)
RAP<3:1> = 0
BIT
NAME
DESCRIPTION
15
TDMD
TRANSMIT DEMAND, when set, causes MK50H27 to access the
Transmit Descriptor Ring without waiting for the transmit polltime inter-
val to elapse. TDMD need not be set to transmit a MSU, it merely has-
tens MK50H27’s response to a Transmit Descriptor Ring entry inser-
tion by the host. TDMD is Write With ONE ONLY and cleared by the
microcode after it is used. It may read as a "1" for a short time after it
is written because the microcode may have been busy when TDMD
was set. It is also cleared by Bus RESET. Writing a "0" in this bit has
no effect.
14
POFF
POFF, when set, indicates that MK50H27 is operating in the Power Off
phase of operation. All external activity is disabled and internal logic is
reset. MK50H27 remains inactive except for primitive processing until
a Power On primitive is issued. POFF IS READ ONLY and set by Bus
RESET or a Power Off primitive. Writing to this bit has no effect.
13
DTX
Transmitter ring disable prevents the MK50H27 from further access to
the Transmitter Descriptor Ring and terminates transmitter polling. No
transmissions are attempted after finishing transmission of any signal
unit in transmission at the time of DTX being set. TXON acknow-
ledges changes to DTX, see below. DTX is READ/WRITE.
1
5
1
4
1
3
0
7
0
8
1
0
1
2
0
1
0
2
0
3
0
4
0
5
0
9
0
6
0
R
I
N
T
I
N
T
P
I
N
T
U
R
M
I
S
M
E
R
O
R
I
N
T
R
X
O
N
T
X
O
N
I
N
E
A
P
O
F
T
D
M
D
T
X
D
R
X
MK50H27
15/56
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