參數(shù)資料
型號: MD2534-D2G-X-P
廠商: SANDISK CORP
元件分類: 存儲控制器/管理單元
英文描述: FLASH MEMORY DRIVE CONTROLLER, PBGA115
封裝: 12 X 9 MM, 1.20 MM HEIGHT, FBGA-115
文件頁數(shù): 27/87頁
文件大?。?/td> 1675K
代理商: MD2534-D2G-X-P
Rev. 1.2
mDOC H3 Modes of Operation
mDOC H3 EFD Featuring Embedded TrueFFS Data Sheet
33
92-DS-1205-10
5.5
Deep Power-Down Mode
While in Deep Power-Down (DPD) mode, the quiescent power dissipation of the mDOC H3
device is further reduced by disabling internal high current consumers (e.g. voltage regulators,
input buffers, oscillator etc.)
Entering Deep Power-Down mode is done by either of the following:
Writing to POWER_DN bit in the Power Mode Register.
Activating a SW API to put the device immediately in DPD.
Setting Auto DPD mode by SW. Depending on Auto DPD mode chosen the device
will either enter DPD upon device inactivity, or enter Standby mode upon device
inactivity and switch to DPD after a configurable period of inactivity.
Entering Deep Power-Down mode and then returning to the previous mode does not affect the
value of any register.
Exiting Deep Power-Down mode is done using one of the following methods:
Performing a read/write access from/to mDOC H3.
RSTIN# assertion.
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