參數(shù)資料
型號： MC68HC705CL48
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 微控制器/微處理器
英文描述： 8-BIT, OTPROM, 1.802 MHz, MICROCONTROLLER, PQFP112
封裝： TQFP-112
文件頁數(shù)： 21/145頁
文件大小： 673K
代理商： MC68HC705CL48
June 11, 1997
GENERAL RELEASE SPECIFICATION
MC68HC05CL48
INSTRUCTION SET
MOTOROLA
REV 2.0
14-7
14.1.13Bit Manipulation Instructions
The CPU can set or clear any writable bit in the rst 256 bytes of memory. Port
registers, port data direction registers, timer registers, and on-chip RAM locations
are in the rst 256 bytes of memory. The CPU can also test and branch based on
the state of any bit in any of the rst 256 memory locations. Bit manipulation
instructions use direct addressing. Table 14-4 lists these instructions.
14.1.14Control Instructions
These register reference instructions control CPU operation during program exe-
cution. Control instructions, listed in Table 14-5, use inherent addressing.
Table 14-4. Bit Manipulation Instructions
Instruction
Mnemonic
Clear Bit
BCLR
Branch if Bit Clear
BRCLR
Branch if Bit Set
BRSET
Set Bit
BSET
Table 14-5. Control Instructions
Instruction
Mnemonic
Clear Carry Bit
CLC
Clear Interrupt Mask
CLI
No Operation
NOP
Reset Stack Pointer
RSP
Return from Interrupt
RTI
Return from Subroutine
RTS
Set Carry Bit
SEC
Set Interrupt Mask
SEI
Stop Oscillator and Enable IRQ Pin
STOP
Software Interrupt
SWI
Transfer Accumulator to Index Register
TAX
Transfer Index Register to Accumulator
TXA
Stop CPU Clock and Enable Interrupts
WAIT
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