參數(shù)資料
型號： MC68HC705CL48
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 微控制器/微處理器
英文描述： 8-BIT, OTPROM, 1.802 MHz, MICROCONTROLLER, PQFP112
封裝： TQFP-112
文件頁數(shù)： 136/145頁
文件大小： 673K
代理商： MC68HC705CL48
GENERAL RELEASE SPECIFICATION
June 11, 1997
MOTOROLA
CALLER-ID
MC68HC05CL48
11-6
REV 2.0
Figure 11-7. 8-bit Caller ID Data Timing Diagram
11.7
CALLER-ID REGISTERS
11.7.1 Control/Status Register1 (CLCSR1)
CDO, BIT0
Carrier Detect Override, when enabled by the CDOE bit in the CLCSR3
register, the carrier detect can be forced by writing a zero to this bit. On reset
this bit is set to one.
RDO, BIT1
Ring Detect Override, when enabled by RDOE in the CLCSR3 register, the ring
detect can be forced by writing a zero to this bit. On reset this bit is set to one.
CDIE, Bit4 (Carrier Detect Interrupt Enable)
When set enables the carrier detect interrupt to be generated when a carrier is
detected or forced by writing to CDO.
76543210
CLCSR1
$000A
READ
RDIF
RDIE
CDIF
CDIE
RDO
CDO
WRITE
0
RESET
0000
U
11
Stop-bit = ‘1’
8-bit word
Bit-Serial Cooked Data
Start-bit
Stop-bit
Start-bit
1
Stop-bit
1
CDRF
RDRF Cleared
by CPU reading CDDR
RDRF Cleared
by CPU reading CDDR
Mark-bits (0-10 bits)
Mark-bit = ‘1’
Start-bit = ‘0’
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