參數(shù)資料
型號： MC68HC705CL48
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 微控制器/微處理器
英文描述： 8-BIT, OTPROM, 1.802 MHz, MICROCONTROLLER, PQFP112
封裝： TQFP-112
文件頁數(shù)： 144/145頁
文件大?。?/td> 673K
代理商： MC68HC705CL48
GENERAL RELEASE SPECIFICATION
June 11, 1997
MOTOROLA
LCD DRIVER
MC68HC05CL48
12-2
REV 2.0
12.1
LCD RAM.
The data to be displayed by the LCD is written to a 90 byte display RAM located at
locations $0930 thru $095C and $0A30 thru $0A5C in the memory map. The bits
are organized according to Table 12-1 and Table 12-2, with a 1 stored in a given
location resulting in the corresponding display segment being activated. The LCD
RAM is a dual port RAM that interfaces with the internal address and data buses
of the MCU. It is possible to read from LCD RAM locations for scrolling purposes.
When the display is disabled, the LCD RAM can be used as on-chip RAM.
Table 12-1. LCD RAM Organization
ADDR
DATA
0
1
234567
$0930
FP0-BP0
FP0-BP1
FP0-BP2
FP0-BP3
FP0-BP4
FP0-BP5
FP0-BP6
FP0-BP7
$0931
FP1-BP0
FP1-BP1
FP1-BP2
FP1-BP3
FP1-BP4
FP1-BP5
FP1-BP6
FP1-BP7
$0932
FP2-BP0
FP2-BP1
FP2-BP2
FP2-BP3
FP2-BP4
FP2-BP5
FP2-BP6
FP2-BP7
.
$095A
FP42-BP0
FP42-BP1
FP42-BP2
FP42-BP3
FP42-BP4
FP42-BP5
FP42-BP6
FP42-BP7
$095B
FP43-BP0
FP43-BP1
FP43-BP2
FP43-BP3
FP43-BP4
FP43-BP5
FP43-BP6
FP43-BP7
$095C
FP44-BP0
FP44-BP1
FP44-BP2
FP44-BP3
FP44-BP4
FP44-BP5
FP44-BP6
FP44-BP7
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