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參數(shù)資料
| 型號(hào)： | MC68HC05CT4FN |
| 廠商： | MOTOROLA INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 2.048 MHz, MICROCONTROLLER, PQCC44 |
| 封裝： | PLASTIC, LCC-44 |
| 文件頁(yè)數(shù)： | 139/142頁(yè) |
| 文件大小： | 624K |
| 代理商： | MC68HC05CT4FN |
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NON-DISCLOSURE
AGREEMENT
REQUIRED
Pulse Width Modulator (PWM)
General Release Specification
MC68HC05CT4 — Rev. 2.0
96
Pulse Width Modulator (PWM)
MOTOROLA
12.4 PWM Data Register
One PWM data register (PWMDR), located at $0020, is associated with
the PWM system. This 8-bit data register holds the duty cycle for the
PWM output; however, only six of these bits are used. PWMDR can be
written to and read at any time. Writes to the PWMDR are buffered and
are not transferred to the active register until the end of the PWM cycle
during which the write was executed.
Upon RESET the user should write to the data register prior to enabling
the PWM system (for example, prior to setting the PWME bit in the
miscellaneous control register). This avoids an erroneous duty cycle
from being driven.
PWME — Miscellaneous Control Register PWM Enable Bit
When set, this bit enables the PWM subsystem. Its main function is to
allow the user to save power when not using the PWM. When
enabled, the clocks are active to the module. When clear, this bit
shuts off the clocks to the module and relinquishes control of PC7 to
the port C logic (the PC7 pullup option should not be selected if the
PWM is used). Reset clears this bit. This bit is located in the
miscellaneous control register found in Section 13. Comparators.
Address:
$0020
Bit 7
654321
Bit 0
Read:
00
Write:
Reset:
Unaffected by Reset
Figure 12-3. PWM Data Register (PWMDR)
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