參數(shù)資料
型號: MC68HC05CT4FN
廠商: MOTOROLA INC
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 2.048 MHz, MICROCONTROLLER, PQCC44
封裝: PLASTIC, LCC-44
文件頁數(shù): 104/142頁
文件大?。?/td> 624K
代理商: MC68HC05CT4FN
NON-DISCLOSURE
AGREEMENT
REQUIRED
16-Bit Timer
General Release Specification
MC68HC05CT4 Rev. 2.0
64
16-Bit Timer
MOTOROLA
8.6 Timer Control Register
The TCR is a read/write register containing six control bits. Three bits
control interrupts associated with the timer status register flags ICF,
OCF, and TOF.
ICIE — Input Capture Interrupt Enable
1 = Interrupt enabled
0 = Interrupt disabled
OCIE — Output Compare Interrupt Enable
1 = Interrupt enabled
0 = Interrupt disabled
TOIE — Timer Overflow Interrupt Enable
1 = Interrupt enabled
0 = Interrupt disabled
TON — Timer On
When disabled, the timer is initialized to the reset condition.
1 = Timer enabled
0 = Timer disabled
IEDG — Input Edge
Value of input edge determines which level transition on the TCAP pin
will trigger a free-running counter transfer to the input capture
register. Reset clears this bit.
1 = Positive edge
0 = Negative edge
Address:
$0012
Bit 7
654321
Bit 0
Read:
ICIE
OCIE
TOIE
0
TON
IEDG
OLVL
Write:
Reset:
00000000
Figure 8-2. Timer Control Register (TCR)
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