參數(shù)資料
型號: MC68HC05CT4FN
廠商: MOTOROLA INC
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 2.048 MHz, MICROCONTROLLER, PQCC44
封裝: PLASTIC, LCC-44
文件頁數(shù): 111/142頁
文件大?。?/td> 624K
代理商: MC68HC05CT4FN
NON-DISCLOSURE
AGREEMENT
REQUIRED
Synchronous Serial Interface (SSI)
General Release Specification
MC68HC05CT4 Rev. 2.0
70
Synchronous Serial Interface (SSI)
MOTOROLA
Transmission in master mode is initiated by a write to the SSI data
register (SDR). A transfer cannot be initiated in slave mode; the external
master initiates the transfer. The programmer must choose between
master or slave mode before the SSI is enabled. The programmer must
ensure that only one master exists in the system at any one time. All
devices in the system must operate with the same clock polarity and
data rates. Slaves should always be disabled before the master is
disabled.
Figure 9-1. SSI Block Diagram
INTERRUPT CIRCUIT
TO INTERRUPT LOGIC
SSI STATUS REG.
SSI CONTROL REG.
SSI DATA REG.
HFF
SDIO
SCK
CLOCK GENERATOR
SF
DCOL
START
SE
MSTR
SR
LSBF
CONTROL LOGIC
000000
SE
DATA BUS
CONTROLS/ADDRESS BUS
INTERRUPT
MCU INTERNAL BUS
CPOL
MSTR
T/R
&
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