參數(shù)資料
型號: MC68HC05CT4FN
廠商: MOTOROLA INC
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 2.048 MHz, MICROCONTROLLER, PQCC44
封裝: PLASTIC, LCC-44
文件頁數(shù): 131/142頁
文件大小: 624K
代理商: MC68HC05CT4FN
Dual Phase-Locked Loop (PLL)
Registers
MC68HC05CT4 Rev. 2.0
General Release Specification
MOTOROLA
Dual Phase-Locked Loop (PLL)
89
NON-DISCLOSURE
AGREEMENT
REQUIRED
11.3.2 12-Bit Reference Counter Modulus Register
This 2-byte register holds the count for the 12-bit reference counter. The
reference counter is shut off and held in reset when the REFON bit is
cleared. For proper operation, this register must not be loaded with a
value less than $000F.
NOTE:
Bit 4 to bit 7 of $000B are not used but they are physically present. The
user may use these four bits for scratch memory.
Address:
$000B
Bit 7
654321
Bit 0
Read:
PLLRC11 PLLRC10
PLLRC9
PLLRC8
Write:
Reset:
00000000
Address:
$000C
Bit 7
654321
Bit 0
Read:
PLLRC7
PLLRC6
PLLRC5
PLLRC4
PLLRC3
PLLRC2
PLLRC1
PLLRC0
Write:
Reset:
00000000
= Unimplemented
Figure 11-3. 12-Bit Reference Counter (PLLRC)
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