參數(shù)資料
型號: MC56F8000RM
廠商: 飛思卡爾半導(dǎo)體(中國)有限公司
英文描述: 16-bit Digital Signal Controllers
中文描述: 16位數(shù)字信號控制器
文件頁數(shù): 44/124頁
文件大?。?/td> 1880K
代理商: MC56F8000RM
56F8013 Technical Data, Rev. 2
44
Freescale Semiconductor
Preliminary
5.4 Block Diagram
Figure 5-1 Interrupt Controller Block Diagram
5.5 Operating Modes
The ITCN module design contains two major modes of operation:
Functional Mode
The ITCN is in this mode by default.
Wait and Stop Modes
During Wait and Stop modes, the system clocks and the 56800E core are turned off. The ITCN will signal
a pending IRQ to the System Integration Module (SIM) to restart the clocks and service the IRQ. An IRQ
can only wake up the core if the IRQ is enabled prior to entering the Wait or Stop mode.
Priority
Level
2 -> 4
Decode
INT0
Priority
Level
2 -> 4
Decode
INT45
Level 0
46 -> 6
Priority
Encoder
any0
Level 3
46 -> 6
Priority
Encoder
any3
INT
VAB
IPIC
CONTROL
6
6
PIC_EN
IACK
SR[9:8]
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