參數(shù)資料
型號: MC56F8000RM
廠商: 飛思卡爾半導體(中國)有限公司
英文描述: 16-bit Digital Signal Controllers
中文描述: 16位數(shù)字信號控制器
文件頁數(shù): 34/124頁
文件大?。?/td> 1880K
代理商: MC56F8000RM
56F8013 Technical Data, Rev. 2
34
Freescale Semiconductor
Preliminary
Reserved
TMR3_COMP1
$30
Compare Register 1
TMR3_COMP2
$31
Compare Register 2
TMR3_CAPT
$32
Capture Register
TMR3_LOAD
$33
Load Register
TMR3_HOLD
$34
Hold Register
TMR3_CNTR
$35
Counter Register
TMR3_CTRL
$36
Control Register
TMR3_SCTRL
$37
Status and Control Register
TMR3_CMPLD1
$38
Comparator Load Register 1
TMR3_CMPLD2
$39
Comparator Load Register 2
TMR3_CSCTRL
$3A
Comparator Status and Control Register
Table 4-8 Pulse Width Modulator Registers Address Map
(PWM_BASE = $00 F040)
Register Acronym
Address Offset
Register Description
PWM_CTRL
$0
Control Register
PWM_FCTRL
$1
Fault Control Register
PWM_FLTACK
$2
Fault Status Acknowledge Register
PWM_OUT
$3
Output Control Register
PWM_CNTR
$4
Counter Register
PWM_CMOD
$5
Counter Modulo Register
PWM_VAL0
$6
Value Register 0
PWM_VAL1
$7
Value Register 1
PWM_VAL2
$8
Value Register 2
PWM_VAL3
$9
Value Register 3
PWM_VAL4
$A
Value Register 4
PWM_VAL5
$B
Value Register 5
PWM_DTIM0
$C
Dead Time Register 0
PWM_DTIM1
$D
Dead Time Register 1
PWM_DMAP1
$E
Disable Mapping Register 1
PWM_DMAP2
$F
Disable Mapping Register 2
PWM_CNFG
$10
Configure Register
PWM_CCTRL
$11
Channel Control Register
PWM_PORT
$12
Port Register
PWM_ICCTRL
$13
Internal Correction Control Register
PWM_SCTRL
$14
Source Control Register
Table 4-7 Quad Timer Registers Address Map
(TMR_BASE = $00 F000) (Continued)
Register Acronym
Address Offset
Register Description
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