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參數(shù)資料
| 型號： | MC56F8000RM |
| 廠商： | 飛思卡爾半導(dǎo)體(中國)有限公司 |
| 英文描述： | 16-bit Digital Signal Controllers |
| 中文描述： | 16位數(shù)字信號控制器 |
| 文件頁數(shù)： | 27/124頁 |
| 文件大?。?/td> | 1880K |
| 代理商： | MC56F8000RM |
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Pin Descriptions
56F8013 Technical Data, Rev. 2
Freescale Semiconductor
Preliminary
27
3.5 Pin Descriptions
3.5.1
The relaxation oscillator is included on chip and the reset mode is to use this as the clock source for the
chip. The user then has the option of switching to an external clock reference if desired.
External Reference (GPIOB6 / RXD)
Part 4 Memory Map
4.1 Introduction
The 56F8013 device is a 16-bit motor-control chip based on the 56800E core. It uses a Harvard-style
architecture with two independent memory spaces for Data and Program. On-chip RAM is used in both
spaces and Flash memory is used only in Program space.
This section provides memory maps for:
Program Address Space, including the Interrupt Vector Table
Data Address Space, including the EOnCE Memory and Peripheral Memory Maps
On-chip memory sizes for the device are summarized in
Table 4-1
.
Flash memories’ restrictions are
identified in the “Use Restrictions” column of
Table 4-1
.
4.2 Interrupt Vector Table
Table 4-2
provides the 56F8013’s reset and interrupt priority structure, including on-chip peripherals. The
table is organized with higher-priority vectors at the top and lower-priority interrupts lower in the table.
As indicated, the priority of an interrupt can be assigned to different levels, allowing some control over
interrupt priorities. All level 3 interrupts will be serviced before level 2, and so on. For a selected priority
level, the lowest vector number has the highest priority.
The location of the vector table is determined by the Vector Base Address (VBA). Please see
Section
5.6.11
for the reset value of the VBA.
By default, VBA = 0, and the reset address and COP reset address will correspond to vector 0 and 1 of the
interrupt vector table. In these instances, the first two locations in the vector table must contain branch or
JMP instructions. All other entries must contain JSR
instructions.
Table 4-1 Chip Memory Configurations
On-Chip Memory
56F8013
Use Restrictions
Program Flash
(PFLASH)
8k x 16
Erase / Program via Flash interface unit and word writes to CDBW
Unified RAM (ram)
2k x 16
Usable by both the Program and Data memory spaces
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MC56F8002 | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Digital Signal Controller |
| MC56F8002VWL | 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC DSC 28SOIC 12K Flash RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT |
| MC56F8002VWL | 制造商:Freescale Semiconductor 功能描述:IC DSC 16BIT 12KB 32MHZ 3.6V SOIC-28 |
| MC56F8006 | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Digital Signal Controller |
| MC56F8006DEMO | 功能描述:開發(fā)板和工具包 - 其他處理器 MC56F8006 DEMO BOARD RoHS:否 制造商:Freescale Semiconductor 產(chǎn)品:Development Systems 工具用于評估:P3041 核心:e500mc 接口類型:I2C, SPI, USB 工作電源電壓: |
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