參數(shù)資料
型號: MAX7000B
廠商: Altera Corporation
英文描述: Programmable Logic Device
中文描述: 可編程邏輯器件
文件頁數(shù): 24/66頁
文件大?。?/td> 421K
代理商: MAX7000B
24
Altera Corporation
MAX 7000B Programmable Logic Device Data Sheet
MAX 7000B devices contain two I/O banks. Both banks support all
standards. Each I/O bank has its own
VCCIO
pins. A single device can
support 1.8-V, 2.5-V, and 3.3-V interfaces; each bank can support a
different standard independently. Within a bank, any one of the
terminated standards can be supported.
Figure 9
shows the arrangement of the MAX 7000B I/O banks.
Figure 9. MAX 7000B I/O Banks for Various Advanced I/O Standards
Table 11
shows which macrocells have pins in each I/O bank.
Each MAX 7000B device has two
VREF
pins. Each can be set to a separate
V
REF
level. Any I/O pin that uses one of the voltage-referenced standards
(GTL+, SSTL-2, or SSTL-3) may use either of the two
VREF
pins. If these
pins are not required as
VREF
pins, they may be individually
programmed to function as user I/O pins.
Table 11. Macrocell Pins Contained in Each I/O Bank
Device
Bank 1
Bank 2
EPM7032B
EPM7064B
EPM7128B
EPM7256B
EPM7512B
1-16
1-32
1-64
17-32
33-64
65-128
1-128, 177-181
1-265
129-176, 182-256
266-512
Individual
Power Bus
Programmable I/O Banks
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