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參數(shù)資料
| 型號： | MAX7000B |
| 廠商： | Altera Corporation |
| 英文描述： | Programmable Logic Device |
| 中文描述： | 可編程邏輯器件 |
| 文件頁數(shù)： | 19/66頁 |
| 文件大小： | 421K |
| 代理商： | MAX7000B |
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Altera Corporation
19
MAX 7000B Programmable Logic Device Data Sheet
Programming
with External
Hardware
MAX 7000B devices can be programmed on Windows-based PCs with an
Altera Logic Programmer card, the Master Programming Unit (MPU),
and the appropriate device adapter. The MPU performs continuity
checking to ensure adequate electrical contact between the adapter and
the device.
f
For more information, see the
Altera Programming Hardware Data Sheet
.
The Altera software can use text- or waveform-format test vectors created
with the Altera Text Editor or Waveform Editor to test the programmed
device. For added design verification, designers can perform functional
testing to compare the functional device behavior with the results of
simulation.
Data I/O, BP Microsystems, and other programming hardware
manufacturers provide programming support for Altera devices. For
more information, see
Programming Hardware Manufacturers
.
IEEE Std.
1149.1 (JTAG)
Boundary-Scan
Support
MAX 7000B devices include the JTAG boundary-scan test circuitry
defined by IEEE Std. 1149.1.
Table 6
describes the JTAG instructions
supported by MAX 7000B devices. The pin-out tables starting on
page 59
of this data sheet show the location of the JTAG control pins for each
device. If the JTAG interface is not required, the JTAG pins are available
as user I/O pins.
Table 6. MAX 7000B JTAG Instructions
JTAG Instruction
Description
SAMPLE/PRELOAD
Allows a snapshot of signals at the device pins to be captured and examined during
normal device operation, and permits an initial data pattern output at the device pins.
Allows the external circuitry and board-level interconnections to be tested by forcing a
test pattern at the output pins and capturing test results at the input pins.
Places the 1-bit bypass register between the
TDI
and
TDO
pins, which allows the
boundary-scan test data to pass synchronously through a selected device to adjacent
devices during normal operation.
Allows the values in the boundary-scan register to determine pin states while placing the
1-bit bypass register between the
TDI
and
TDO
pins.
Selects the IDCODE register and places it between the
TDI
and
TDO
pins, allowing the
IDCODE to be serially shifted out of
TDO
.
Selects the 32-bit USERCODE register and places it between the
TDI
and
TDO
pins,
allowing the USERCODE value to be shifted out of
TDO
.
These instructions are used when programming MAX 7000B devices via the JTAG ports
with the MasterBlaster or ByteBlasterMV download cable, or using a Jam File (
.jam
),
Jam Byte-Code File (
.jbc
), or Serial Vector Format File (
.svf
) via an embedded
processor or test equipment.
EXTEST
BYPASS
CLAMP
IDCODE
USERCODE
ISP Instructions
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| MAX7000S | 制造商:ALTERA 制造商全稱:Altera Corporation 功能描述:Programmable Logic Device Family |
| MAX700C/D | 功能描述:監(jiān)控電路 RoHS:否 制造商:STMicroelectronics 監(jiān)測電壓數(shù): 監(jiān)測電壓: 欠電壓閾值: 過電壓閾值: 輸出類型:Active Low, Open Drain 人工復位:Resettable 監(jiān)視器:No Watchdog 電池備用開關:No Backup 上電復位延遲（典型值）:10 s 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:UDFN-6 封裝:Reel |
| MAX700C/D DIE | 制造商:Maxim Integrated Products 功能描述: |
| MAX700CPA | 功能描述:監(jiān)控電路 Integrated Circuits (ICs) RoHS:否 制造商:STMicroelectronics 監(jiān)測電壓數(shù): 監(jiān)測電壓: 欠電壓閾值: 過電壓閾值: 輸出類型:Active Low, Open Drain 人工復位:Resettable 監(jiān)視器:No Watchdog 電池備用開關:No Backup 上電復位延遲（典型值）:10 s 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:UDFN-6 封裝:Reel |
| MAX700CPA+ | 功能描述:監(jiān)控電路 Power-Supply Monitor w/Reset RoHS:否 制造商:STMicroelectronics 監(jiān)測電壓數(shù): 監(jiān)測電壓: 欠電壓閾值: 過電壓閾值: 輸出類型:Active Low, Open Drain 人工復位:Resettable 監(jiān)視器:No Watchdog 電池備用開關:No Backup 上電復位延遲（典型值）:10 s 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:UDFN-6 封裝:Reel |
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