參數(shù)資料
型號： M37920FGCHP
廠商： Mitsubishi Electric Corporation
英文描述： Single Chip 16 Bits CMOS Microcomputer(16位單片機(jī))
中文描述： 單片微機(jī)16位的CMOS（16位單片機(jī)）
文件頁數(shù)： 68/158頁
文件大?。?/td> 1261K
代理商： M37920FGCHP
M37920FCCGP, M37920FCCHP
M37920FGCGP, M37920FGCHP
PRELIMINARY
Notice: This is not a final specification.
Some parametric limits are subject to change.
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER FLASH MEMORY VERSION
MITSUBISHI MICROCOMPUTERS
68
Trigger
A-D conversion can be started by software trigger or by an external
input trigger.
Software trigger is selected when bit 5 of A-D control register 0 is
“
0
”
and an external trigger is selected when it is
“
1
”
. When a software
trigger is selected, A-D conversion is started when bit 6 (A-D conver-
sion start bit) is set to
“
1.
”
When an external trigger is selected, the polarity of a trigger input
can be selected by bit 5 of the A-D control register 1. When bit 5 =
“
0
”
, a falling edge is selected, and when bit 5 =
“
1
”
, a rising edge is
selected.
A-D conversion starts when the A-D conversion start bit is
“
1
”
and the
AD
TRG
input changes from
“
H
”
to
“
L
”
(or
“
L
”
to
“
H.
”
) In this case, the
pins that can be used for A-D conversion are AN
0
to AN
2
because the
AD
TRG
pin is multiplexed with an analog voltage input pin, AN
3
. If an
Fig. 64 Bit configuration of A-D control register 0
external trigger is selected, even when the A-D conversion is com-
pleted, the A-D conversion start bit keeps
“
1
”
. Also, a retrigger can be
available even when A-D conversion is in progress.
V
REF
connection
Whether to connect the reference voltage input (V
REF
) with the resis-
tor ladder network or not depends on bit 6 of the A-D control register
1. The V
REF
pin is connected when bit 6 is
“
0
”
and is disconnected
when bit 6 is
“
1
”
(High impedance state).
When A-D conversion is not performed, current from the V
REF
pin to
the resistor ladder network can be cut off by disconnecting resistor
ladder network from the V
REF
pin.
Before starting A-D conversion, wait for 1
μ
s or more after clearing
bit 6 to
“
0
”
.
A-D control register 0
Address
1E
16
7
6
5
4
3
2
0
1
0
Analog input select bits
(Valid in the one-shot and repeat modes.)
0 0 : Select AN
0
0 1 : Select AN
1
1 0 : Select AN
2
1 1 : Select AN
3
Must be “0”.
A-D operation mode select bits
0 0 : One-shot mode
0 1 : Repeat mode
1 0 : Single sweep mode
1 1 : Repeat sweep mode
Trigger select bit
0 : Software trigger
1 : External trigger due to AD
TRG
input
A-D conversion start bit (Note 7)
0 : Stop A-D conversion
1 : Start A-D conversion
A-D conversion frequency (
φ
AD
) select bit 0
0
7
6
5
4
3
2
1
0
0
A-D sweep pin select bit
(Valid in the single sweep mode and repeat sweep mode.)
0 : AN
0
, AN
1
1 : AN
0
–AN
3
Must be “0”.
Resolution select bit
0: 8-bit mode
1: 10-bit mode
A-D conversion frequency (
φ
AD
) select bit 1
External trigger polarity select bit
(Valid when external trigger is selected.)
0: Falling edge
1: Rising edge
V
REF
connection select bit
0 : V
REF
is connected.
1 : V
REF
is not connected.
“0” at read.
(2 pins)
(4 pins)
A-D control register 1
Address
1F
16
A-D conversion frequency (
φ
AD
) select bit
Bit 1
0
0
0
1
1
1
0
1
Bit 0
φ
AD
f
2
/4
f
2
/2
f
2
f
1
(Selectable only in 8-bit mode)
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