- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄384637 > M37920FGCGP (Mitsubishi Electric Corporation) Single Chip 16 Bits CMOS Microcomputer(16位單片機(jī)) PDF資料下載
參數(shù)資料
| 型號(hào)： | M37920FGCGP |
| 廠商： | Mitsubishi Electric Corporation |
| 英文描述： | Single Chip 16 Bits CMOS Microcomputer(16位單片機(jī)) |
| 中文描述： | 單片微機(jī)16位的CMOS（16位單片機(jī)） |
| 文件頁(yè)數(shù)： | 92/158頁(yè) |
| 文件大?。?/td> | 1261K |
| 代理商： | M37920FGCGP |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)第83頁(yè)第84頁(yè)第85頁(yè)第86頁(yè)第87頁(yè)第88頁(yè)第89頁(yè)第90頁(yè)第91頁(yè)當(dāng)前第92頁(yè)第93頁(yè)第94頁(yè)第95頁(yè)第96頁(yè)第97頁(yè)第98頁(yè)第99頁(yè)第100頁(yè)第101頁(yè)第102頁(yè)第103頁(yè)第104頁(yè)第105頁(yè)第106頁(yè)第107頁(yè)第108頁(yè)第109頁(yè)第110頁(yè)第111頁(yè)第112頁(yè)第113頁(yè)第114頁(yè)第115頁(yè)第116頁(yè)第117頁(yè)第118頁(yè)第119頁(yè)第120頁(yè)第121頁(yè)第122頁(yè)第123頁(yè)第124頁(yè)第125頁(yè)第126頁(yè)第127頁(yè)第128頁(yè)第129頁(yè)第130頁(yè)第131頁(yè)第132頁(yè)第133頁(yè)第134頁(yè)第135頁(yè)第136頁(yè)第137頁(yè)第138頁(yè)第139頁(yè)第140頁(yè)第141頁(yè)第142頁(yè)第143頁(yè)第144頁(yè)第145頁(yè)第146頁(yè)第147頁(yè)第148頁(yè)第149頁(yè)第150頁(yè)第151頁(yè)第152頁(yè)第153頁(yè)第154頁(yè)第155頁(yè)第156頁(yè)第157頁(yè)第158頁(yè)
M37920FCCGP, M37920FCCHP
M37920FGCGP, M37920FGCHP
PRELIMINARY
Notice: This is not a final specification.
Some parametric limits are subject to change.
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER FLASH MEMORY VERSION
MITSUBISHI MICROCOMPUTERS
92
DRAM CONTROLLER
The DRAM controller directly accesses the DRAM located in the ex-
ternal chip select area (CS
1
, CS
2
, CS
3
).
Figure 88 shows the block diagram of the DRAM controller. Table 19
shows the functions of the DRAM-related signals, and Table 20
shows the relationship between the external data bus width and the
multiplexed addresses.
The start address, block size, external data bus width, and DRAM
space of the chip select area, which is to be accessed by the DRAM
controller, are specified by the CS
j
control register L, CS
j
control reg-
ister H, and the area CS
j
start address register in the chip select wait
controller. For more details, refer to the section on the chip select
wait controller.
Figure 89 shows the bit configuration of the CS
j
control register L
with use of the DRAM controller. Bit 4 is the DRAM space designa-
tion bit. When bit 4 is set to “1”, pins A
8
/MA
0
to A
16
/MA
8
, A
18
/MA
9
,
A
20
/MA
10
, A
22
/MA
11
, and P9
4
to P9
6
, become the output pins for the
DRAM control signals.
Figure 90 shows the bit configuration of the DRAM control register.
Bit 0 is the byte control select bit. When the device type of DRAM to
be connected is 1CAS/2W, be sure to clear this bit to “0”, and when
the device type of DRAM to be connected is 2CAS/1W, be sure to set
this bit to “1”. When the external data bus width = 8 bits, however, be
sure to clear this bit to “0”. Table 21 shows the relationship between
the byte control select bit and the pin functions. Each of Figures 91
and 92 shows an operating waveform example of the DRAM control
signals, address bus, and data buses with 1CAS/2W or 2CAS/1W
selected.
Bit 4 of the DRAM control register is the self-refresh operation select
bit and controls the DRAM self-refresh operation in the stop mode;
“0” disables the self-refresh operation in the stop mode, and “1” en-
ables the self-refresh operation. Bit 7 is the refresh timer count start
bit. The refresh timer starts counting when this bit is set to “1”.
Figure 94 shows an operating waveform example of the DRAM con-
trol signals at refresh. This refreshing method, as shown in Figure
94, is the “CAS before RAS refresh”. This method makes signal CAS
falls before signal RAS falls.
The refresh interval is determined by the refresh timer (address
A9
16
). The refresh timer is an 8-bit timer performing a repetitive
count with the reload register. The clock source is internal clock f
32
.
The refresh time issues a refresh request to the BIU each time when
the refresh timer’s count value reaches 00
16
. Therefore, the relation-
ship between the value to be loaded into the refresh timer, n (n = 01
16
to FF
16
), and DRAM refresh interval, m (μs), is as follows:
n =
{
m
f(X
IN
) / 32
}
– 1
Once the BIU accepts a refresh request, it performs the bus arbitra-
tion for the CPU and DMAC and outputs the refresh enable signal to
the DRAM controller. Accordingly, the DRAM controller makes the re-
fresh cycle (CAS before RAS refresh).
In the stop mode, since the refresh timer stops counting and the
DRAM controller cannot perform the refresh operation (CAS before
RAS refresh).
For DRAM supporting the self-refresh operation, by setting the self-
refresh operation select bit to “1” before going into the stop mode,
the self-refresh operation in the stop mode can be enabled.
Figure 95 shows an operating waveform example of the DRAM con-
trol signals at self-refresh.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| M37920FCCGP | Single Chip 16 Bits CMOS Microcomputer(16位單片機(jī)) |
| M37920FCCHP | Single Chip 16 Bits CMOS Microcomputer(16位單片機(jī)) |
| M37920FGCHP | Single Chip 16 Bits CMOS Microcomputer(16位單片機(jī)) |
| M3802 | Single Chip 8 Bits Microcomputer(8位單片機(jī)) |
| M3820 | Single Chip 8 Bits Microcomputer(8位單片機(jī)) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M37920FGCHP | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER FLASH MEMORY VERSION |
| M37920S4CGP | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:16 BIT CMOS MICROCOMPUTER |
| M37P75C4P3 | 功能描述:汽車連接器 Pin Contact RoHS:否 制造商:Amphenol SINE Systems 產(chǎn)品:Contacts 系列:ATP 位置數(shù)量: 型式:Female 安裝風(fēng)格: 端接類型: 觸點(diǎn)電鍍:Nickel |
| M37S07K4F3 | 功能描述:汽車連接器 Sckt Contact RoHS:否 制造商:Amphenol SINE Systems 產(chǎn)品:Contacts 系列:ATP 位置數(shù)量: 型式:Female 安裝風(fēng)格: 端接類型: 觸點(diǎn)電鍍:Nickel |
| M37S07K4P3 | 功能描述:汽車連接器 Sckt Contacts RoHS:否 制造商:Amphenol SINE Systems 產(chǎn)品:Contacts 系列:ATP 位置數(shù)量: 型式:Female 安裝風(fēng)格: 端接類型: 觸點(diǎn)電鍍:Nickel |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。