參數(shù)資料
型號(hào)： M37902FCCHP
元件分類： 微控制器/微處理器
英文描述： 16-BIT, FLASH, 26 MHz, MICROCONTROLLER, PQFP100
封裝： 14 X 14 MM, 0.50 MM PITCH, PLASTIC, LQFP-100
文件頁數(shù)： 95/143頁
文件大?。?/td> 1148K
代理商： M37902FCCHP
55
M37902FCCHP, M37902FGCHP, M37902FJCHP
MITSUBISHI MICROCOMPUTERS
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
(2) Event counter mode [01]
Figure 46 shows the bit configuration of the timer Ai mode register
during event counter mode. In event counter mode, bit 0 of the timer
Ai mode register must be “1” and bits 1 and 5 must be “0”.
The input signal from the TAiIN pin is counted when the count start
bit shown in Figure 44 is “1” and counting is stopped when it is “0”.
Count is performed at the fall of the input signal when bit 3 is “0” and
at the rise of the signal when it is “1”.
In event counter mode, whether to increment or decrement the count
can be selected with the up-down bit or the input signal from the
TAiOUT pin.
When bit 4 of the timer Ai mode register is “0”, the up-down bit is
used to determine whether to increment or decrement the count
(decrement when the bit is “0” and increment when it is “1”). Figure
47 shows the bit configuration of the up-down register.
When bit 4 of the timer Ai mode register is “1”, the input signal from
the TAiOUT pin is used to determine whether to increment or decre-
ment the count. However, note that bit 2 must be “0” if bit 4 is “1.” It is
because if bit 2 is “1”, TAiOUT pin becomes an output pin to output
pulses.
The count is decremented when the input signal from the TAiOUT pin
is “L” and incremented when it is “H”. Determine the level of the input
signal from the TAiOUT pin before a valid edge is input to the TAiIN
pin.
An interrupt request signal is generated and the interrupt request bit
in the timer Ai interrupt control register is set when the counter
reaches 000016 (decrement count) or FFFF16 (increment count). At
the same time, the contents of the reload register is transferred to the
counter and the count is continued.
When bit 2 is “1,” each time the counter reaches 000016 (decrement
count) or FFFF16(increment count), the waveform’s polarity is re-
versed and is output from TAiOUT pin.
If bit 2 is “0”, TAiOUT pin can be used as a normal port pin.
However, if bit 4 is “1” and the TAiOUT pin is used as an output pin,
the output from the pin changes the count direction. Therefore, bit 4
must be “0” unless the output from the TAiOUT pin is to be used to se-
lect the count direction.
Fig. 46 Bit configuration of timer Ai mode register during event counter mode
Fig. 47 Bit configuration of up-down register
76543210
1
0
×
0 1 : Always “01” in event counter mode
0 : No pulse output
1 : Pulse output
0 : Count at the falling edge of input signal
1 : Count at the rising edge of input signal
0 : Increment or decrement according
to up/down bit
1 : Increment or decrement according
to TAiOUT pin input signal level
0 : Always “0” in event counter mode
× × : Not used in event counter mode
Timer A0 mode register
Timer A1 mode register
Timer A2 mode register
Timer A3 mode register
Timer A4 mode register
Addresses
5616
5716
5816
5916
5A16
Note: When using pins TA2OUT and TA3OUT as pulse output pins, do
not select pins KI0 and KI2. Because they are key input interrupt
pins and are multiplexed with pins TA2OUT and TA3OUT.
Timer A0 up-down bit
Timer A1 up-down bit
Timer A2 up-down bit
Timer A3 up-down bit
Timer A4 up-down bit
Timer A2 two-phase pulse signal
processing select bit
0 : Two-phase pulse signal processing
disabled
1 : Two-phase pulse signal processing
mode
Timer A3 two-phase pulse signal
processing select bit
0 : Two-phase pulse signal processing
disabled
1 : Two-phase pulse signal processing
mode
Timer A4 two-phase pulse signal
processing select bit
0 : Two-phase pulse signal processing
disabled
1 : Two-phase pulse signal processing
mode
Up-down register
76543210
Address
4416
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