參數(shù)資料
型號(hào)： M32180F8VFP
元件分類： 微控制器/微處理器
英文描述： 32-BIT, FLASH, 64 MHz, RISC MICROCONTROLLER, PQFP240
封裝： 32 X 32 MM, 0.50 MM PITCH, PLASTIC, QFP-240
文件頁數(shù)： 97/139頁
文件大?。?/td> 3774K
代理商： M32180F8VFP
3
3-9
ADDRESS SPACE
3.4 Internal RAM and SFR Areas
32180 Group User’s Manual (Rev.1.0)
SFR Area Register Map (2/27)
Address
+0 address
+1 address
See pages
b0
b7 b8
b15
H'0080 009C
10-bit A-D0 Data Register 6
11-31
(AD0DT6)
H'0080 009E
10-bit A-D0 Data Register 7
11-31
(AD0DT7)
H'0080 00A0
10-bit A-D0 Data Register 8
11-31
(AD0DT8)
H'0080 00A2
10-bit A-D0 Data Register 9
11-31
(AD0DT9)
H'0080 00A4
10-bit A-D0 Data Register 10
11-31
(AD0DT10)
H'0080 00A6
10-bit A-D0 Data Register 11
11-31
(AD0DT11)
H'0080 00A8
10-bit A-D0 Data Register 12
11-31
(AD0DT12)
H'0080 00AA
10-bit A-D0 Data Register 13
11-31
(AD0DT13)
H'0080 00AC
10-bit A-D0 Data Register 14
11-31
(AD0DT14)
H'0080 00AE
10-bit A-D0 Data Register 15
11-31
(AD0DT15)
(Use inhibited area)
H'0080 00D0
(Use inhibited area)
8-bit A-D0 Data Register 0
11-32
(AD08DT0)
H'0080 00D2
(Use inhibited area)
8-bit A-D0 Data Register 1
11-32
(AD08DT1)
H'0080 00D4
(Use inhibited area)
8-bit A-D0 Data Register 2
11-32
(AD08DT2)
H'0080 00D6
(Use inhibited area)
8-bit A-D0 Data Register 3
11-32
(AD08DT3)
H'0080 00D8
(Use inhibited area)
8-bit A-D0 Data Register 4
11-32
(AD08DT4)
H'0080 00DA
(Use inhibited area)
8-bit A-D0 Data Register 5
11-32
(AD08DT5)
H'0080 00DC
(Use inhibited area)
8-bit A-D0 Data Register 6
11-32
(AD08DT6)
H'0080 00DE
(Use inhibited area)
8-bit A-D0 Data Register 7
11-32
(AD08DT7)
H'0080 00E0
(Use inhibited area)
8-bit A-D0 Data Register 8
11-32
(AD08DT8)
H'0080 00E2
(Use inhibited area)
8-bit A-D0 Data Register 9
11-32
(AD08DT9)
H'0080 00E4
(Use inhibited area)
8-bit A-D0 Data Register 10
11-32
(AD08DT10)
H'0080 00E6
(Use inhibited area)
8-bit A-D0 Data Register 11
11-32
(AD08DT11)
H'0080 00E8
(Use inhibited area)
8-bit A-D0 Data Register 12
11-32
(AD08DT12)
H'0080 00EA
(Use inhibited area)
8-bit A-D0 Data Register 13
11-32
(AD08DT13)
H'0080 00EC
(Use inhibited area)
8-bit A-D0 Data Register 14
11-32
(AD08DT14)
H'0080 00EE
(Use inhibited area)
8-bit A-D0 Data Register 15
11-32
(AD08DT15)
(Use inhibited area)
H'0080 0100
SIO23 Interrupt Request Status Register
SIO03 Interrupt Request Enable Register
12-9
(SI23STAT)
(SI03EN)
12-10
H'0080 0102
SIO03 Interrupt Request Source Select Register
(Use inhibited area)
12-11
(SI03SEL)
(Use inhibited area)
H'0080 0110
SIO0 Transmit Control Register
SIO0 Transmit/Receive Mode Register
12-14
(S0TCNT)
(S0MOD)
12-15
H'0080 0112
SIO0 Transmit Buffer Register
12-18
(S0TXB)
H'0080 0114
SIO0 Receive Buffer Register
12-19
(S0RXB)
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