參數(shù)資料
型號： M32180F8VFP
元件分類： 微控制器/微處理器
英文描述： 32-BIT, FLASH, 64 MHz, RISC MICROCONTROLLER, PQFP240
封裝： 32 X 32 MM, 0.50 MM PITCH, PLASTIC, QFP-240
文件頁數(shù)： 139/139頁
文件大?。?/td> 3774K
代理商： M32180F8VFP
4
4-10
EIT
32180 Group User’s Manual (Rev.1.0)
4.7 EIT Vector Entry
The EIT vector entry is located in the user space beginning with the address H’0000 0000. The table below lists the
EIT vector entry.
Table 4.7.1 EIT Vector Entry
Name
Abbreviation Vector Address
SM
IE
BPC
Reset Interrupt
RI
H'0000 0000 (Note 1) 0
0
Undefined
System Break
SBI
H'0000 0010
0
PC of the next instruction
Interrupt
Reserved Instruction
RIE
H'0000 0020
Unchanged 0
PC of the instruction that generated RIE
Exception
Address Exception
AE
H'0000 0030
Unchanged 0
PC of the instruction that generated RIE
Trap
TRAP0
H'0000 0040
Unchanged 0
PC of TRAP instruction + 4
TRAP1
H'0000 0044
Unchanged 0
PC of TRAP instruction + 4
TRAP2
H'0000 0048
Unchanged 0
PC of TRAP instruction + 4
TRAP3
H'0000 004C
Unchanged 0
PC of TRAP instruction + 4
TRAP4
H'0000 0050
Unchanged 0
PC of TRAP instruction + 4
TRAP5
H'0000 0054
Unchanged 0
PC of TRAP instruction + 4
TRAP6
H'0000 0058
Unchanged 0
PC of TRAP instruction + 4
TRAP7
H'0000 005C
Unchanged 0
PC of TRAP instruction + 4
TRAP8
H'0000 0060
Unchanged 0
PC of TRAP instruction + 4
TRAP9
H'0000 0064
Unchanged 0
PC of TRAP instruction + 4
TRAP10
H'0000 0068
Unchanged 0
PC of TRAP instruction + 4
TRAP11
H'0000 006C
Unchanged 0
PC of TRAP instruction + 4
TRAP12
H'0000 0070
Unchanged 0
PC of TRAP instruction + 4
TRAP13
H'0000 0074
Unchanged 0
PC of TRAP instruction + 4
TRAP14
H'0000 0078
Unchanged 0
PC of TRAP instruction + 4
TRAP15
H'0000 007C
Unchanged 0
PC of TRAP instruction + 4
External Interrupt
EI
H'0000 0080 (Note 2) 0
0
PC of the next instruction
Floating-Point Exception
FPE
H'0000 0090
Unchanged 0
PC of the instruction that generated FPE + 4
Note 1: During boot mode, the CPU starts executing the boot program after reset. For details, see Section 6.5,
“Programming the Internal Flash Memory.”
Note 2: During flash E/W enable mode, this vector address is moved to the beginning of the internal RAM (address H’0080
4000). For details, see Section 6.5, “Programming the Internal Flash Memory.”
4.7 EIT Vector Entry
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