參數(shù)資料
型號： M30240M1-XXXFP
元件分類： 微控制器/微處理器
英文描述： 16-BIT, MROM, MICROCONTROLLER, PQFP80
封裝： 0.80 MM PITCH, PLASTIC, QFP-80
文件頁數(shù)： 119/125頁
文件大小： 753K
代理商： M30240M1-XXXFP
Mitsubishi microcomputers
M16C / 24 Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
95
CONFIDENTIAL
Preliminary Specifications REV.B
Specifications in this manual are tentative and subject to change
UART0 through UART2
Figure 88:
UARTi transmit/receive mode register in UART mode
Table 27:
Specications of UART Mode (2)
Item
Specication
Select
function
Separate CTS/RTS pins (UART0)
UART0 CTS and RTS pins each can be assigned to separate pins
Sleep mode selection (UART0, UART1)
This mode is used to transfer data to and from one of multiple slave micro-computers
Serial data logic switch (UART2)
This function is reversing logic value of transferring data. Start bit, parity bit and stop bit are not reversed.
TxD, RxD I/O polarity switch
This function is reversing TxD port output and RxD port input. All I/O data level is reversed.
Symbol
Address
When reset
UiMR(i=0,1)
03A016, 03A816
0016
CKDIR
UARTi transmit / receive mode registers
Internal / external clock
select bit
STPS
PRY
PRYE
SLEP
0 : Internal clock
1 : External clock
Bit name
Function
Bit symbol
W
R
b7
b6
b5
b4
b3
b2
b1
b0
SMD0
SMD1
SMD2
Serial I/O mode select bit
b2 b1 b0
0 : One stop bit
1 : Two stop bits
0 : Parity disabled
1 : Parity enabled
0 : Sleep mode deselected
1 : Sleep mode selected
1 0 0 : Transfer data 7 bits long
1 0 1 : Transfer data 8 bits long
1 1 0 : Transfer data 9 bits long
Valid when bit 6 = “1”
0 : Odd parity
1 : Even parity
Stop bit length select bit
Odd / even parity
select bit
Parity enable bit
Sleep select bit
Symbol
Address
When reset
U2MR
037816
0016
CKDIR
UART2 transmit / receive mode register
Internal / external clock
select bit
STPS
PRY
PRYE
IOPOL
0 : Internal clock
1 : External clock
Bit name
Function
Bit symbol
W
R
b7
b6
b5
b4
b3
b2
b1
b0
SMD0
SMD1
SMD2
Serial I/O mode select bit
b2 b1 b0
0 : One stop bit
1 : Two stop bits
0 : Parity disabled
1 : Parity enabled
0 : No reverse
1 : Reverse
1 0 0 : Transfer data 7 bits long
1 0 1 : Transfer data 8 bits long
1 1 0 : Transfer data 9 bits long
Valid when bit 6 = “1”
0 : Odd parity
1 : Even parity
Stop bit length select bit
Odd / even parity
select bit
Parity enable bit
TxD, RxD I/O polarity
reverse bit (Note)
Note: Usually set to “0”.
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