參數(shù)資料
型號: M30240M1-XXXFP
元件分類: 微控制器/微處理器
英文描述: 16-BIT, MROM, MICROCONTROLLER, PQFP80
封裝: 0.80 MM PITCH, PLASTIC, QFP-80
文件頁數(shù): 112/125頁
文件大?。?/td> 753K
代理商: M30240M1-XXXFP
Mitsubishi microcomputers
M16C / 24 Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
89
CONFIDENTIAL
Preliminary Specifications REV.B
Specifications in this manual are tentative and subject to change
UART0 through UART2
Figure 82:
UARTi transmit/receive mode register in clock synchronous serial I/O mode
Table 24:
Specications of clock synchronous serial I/O mode (2)
Item
Specication
Select function
CLK polarity selection
Whether transmit data is output/input at the rising edge or falling edge of the transfer clock can be
selected
LSB rst/MSB rst selection
Whether transmission/reception begins with bit 0 or bit 7 can be selected
Continuous receive mode selection
Reception is enabled simultaneously by a read from the receive buffer register
Transfer clock output from multiple pins selection (UART1) (Note)
UART1 transfer clock can be chosen by software to be output from one of the two pins set
Separate CTS/RTS pins (UART0) (Note)
UART0 CTS and RTS pins each can be assigned to separate pins
Switching serial data logic (UART2)
Whether to reverse data in writing to th etransmission buffer register or readin g the reception buffer
register can be sele
Switching serial data logic (UART2)
This function is reversing TxD port output and RxD port input. All I/O data level is reversed.
Symbol
Address
When reset
UiMR(i=0,1)
03A016, 03A816
0016
CKDIR
UARTi transmit/receive mode registers
Internal/external clock
select bit
STPS
PRY
PRYE
SLEP
0 : Internal clock
1 : External clock
Bit name
Function
Bit symbol
W
R
b7
b6
b5
b4
b3
b2
b1
b0
0 (Must always be “0” in clock synchronous serial I/O mode)
01
0
SMD0
SMD1
SMD2
Serial I/O mode select bit
0 0 1 : Clock synchronous serial
I/O mode
b2 b1 b0
0
Invalid in clock synchronous serial I/O mode
Symbol
Address
When reset
U2MR
037816
0016
CKDIR
UART2 transmit/receive mode register
Internal/external clock
select bit
STPS
PRY
PRYE
IOPOL
0 : Internal clock
1 : External clock
Bit name
Function
Bit symbol
W
R
b7
b6
b5
b4
b3
b2
b1
b0
01
0
SMD0
SMD1
SMD2
Serial I/O mode select bit
0 0 1 : Clock synchronous serial
I/O mode
b2 b1 b0
0
Invalid in clock synchronous serial I/O mode
TxD, RxD I/O polarity
reverse bit (Note)
0 : No reverse
1 : Reverse
Note: Usually set to “0”.
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