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參數(shù)資料
| 型號： | KSZ8851SNL-BBE-EVAL |
| 廠商： | Micrel Inc |
| 文件頁數(shù)： | 43/80頁 |
| 文件大?。?/td> | 0K |
| 描述： | BOARD EVAL MAC/PHY FOR KSZ8851 |
| 軟件下載： | KSZ8851SNL Linux Driver Linus' GIT Repo View Driver |
| 設(shè)計資源： | Zippy2 Schematic BeagleBoard Zippy2 KSZ8851SNL-BBE-EVAL Bill of Materials |
| 特色產(chǎn)品： | Zippy 2 |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 系列： | LinkMD® |
| 主要目的： | 接口，以太網(wǎng)控制器（PHY 和 MAC） |
| 嵌入式： | 否 |
| 已用 IC / 零件： | KSZ8851SNL |
| 主要屬性： | 1 個端口，100BASE-TX/10BASE-T |
| 次要屬性： | SPI 接口，LinkMD 線纜診斷 |
| 已供物品： | 板，硬件 |
| 產(chǎn)品目錄頁面： | 1114 (CN2011-ZH PDF) |
| 其它名稱： | 576-3602 KSZ8851SNL-BBE-EVL ZIPPY2 |
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Micrel, Inc.
KSZ8851SNL/SNLI
August 2009
48
M9999-083109-2.0
Wakeup Frame 3 Byte Mask 3 Register (0x6A – 0x6B): WF3BM3
This register contains the last 16 bytes mask values of the Wake up frame 3 pattern. Setting bit 0 selects the 49th byte
of the Wake up frame 3. Setting bit 15 selects the 64th byte of the Wake up frame 3.
Bit
Default Value
R/W
Description
15-0
0
RW
WF3BM3
Wake up Frame 3 Byte Mask 3. The last 16 bytes mask covering bytes 49 to 64 of a
Wake up frame 3 pattern.
0x6C – 0x6F: Reserved
Transmit Control Register (0x70 – 0x71): TXCR
This register holds control information programmed by the CPU to control the QMU transmit module function.
Bit
Default Value
R/W
Description
15-9
-
RO
Reserved
8
0x0
RW
TCGICMP Transmit Checksum Generation for ICMP
When this bit is set, The KSZ8851SNL is enabled to transmit ICMP frame (only for non-
fragment frame) checksum generation.
7
0x0
RO
Reserved
6
0x0
RW
TCGTCP Transmit Checksum Generation for TCP
When this bit is set, The KSZ8851SNL is enabled to transmit TCP frame checksum
generation.
5
0x0
RW
TCGIP Transmit Checksum Generation for IP
When this bit is set, The KSZ8851SNL is enabled to transmit IP header checksum
generation.
4
0x0
RW
FTXQ Flush Transmit Queue
When this bit is set, The transmit queue memory is cleared and TX frame pointer is reset.
Note: Disable the TXE transmit enable bit[0] first before set this bit, then clear this bit to
normal operation.
3
0x0
RW
TXFCE Transmit Flow Control Enable
When this bit is set and the KSZ8851SNL is in full-duplex mode, flow control is enabled.
The KSZ8851SNL transmits a PAUSE frame when the Receive Buffer capacity reaches a
threshold level that will cause the buffer to overflow.
When this bit is set and the KSZ8851SNL is in half-duplex mode, back-pressure flow
control is enabled. When this bit is cleared, no transmit flow control is enabled.
2
0x0
RW
TXPE Transmit Padding Enable
When this bit is set, the KSZ8851SNL automatically adds a padding field to a packet
shorter than 64 bytes.
Note: Setting this bit requires enabling the add CRC feature (bit1=1) to avoid CRC errors
for the transmit packet.
1
0x0
RW
TXCE Transmit CRC Enable
When this bit is set, the KSZ8851SNL automatically adds a 32-bit CRC checksum field to
the end of a transmit frame.
0
0x0
RW
TXE Transmit Enable
When this bit is set, the transmit module is enabled and placed in a running state. When
reset, the transmit process is placed in the stopped state after the transmission of the
current frame is completed.
Transmit Status Register (0x72 – 0x73): TXSR
This register keeps the status of the last transmitted frame.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| KSZ8851SNL-BBE-EVL | 制造商:Micrel Inc 功能描述:BOARD EVAL MAC/PHY FOR KSZ8851 |
| KSZ8851SNL-EVAL | 功能描述:以太網(wǎng)開發(fā)工具 Single Ethernet Port + SPI Bus Interface(Lead Free) Eval Board RoHS:否 制造商:Micrel 產(chǎn)品:Evaluation Boards 類型:Ethernet Transceivers 工具用于評估:KSZ8873RLL 接口類型:RMII 工作電源電壓: |
| KSZ8851SNL-EVAL | 制造商:Micrel Inc 功能描述:BOARD EVALUATION FOR KSZ8851SNL |
| KSZ8851SNLI TR | 功能描述:以太網(wǎng) IC 10/100BT Ethernet MAC + PHY with SPI Bus Interface (I-Temp, Lead free) RoHS:否 制造商:Micrel 產(chǎn)品:Ethernet Switches 收發(fā)器數(shù)量:2 數(shù)據(jù)速率:10 Mb/s, 100 Mb/s 電源電壓-最大:1.25 V, 3.45 V 電源電壓-最小:1.15 V, 3.15 V 最大工作溫度:+ 85 C 封裝 / 箱體:QFN-64 封裝:Tray |
| KSZ8851SNLITR | 制造商:Micrel 功能描述:Ethernet Controller Single Chip 100Mbps |
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