參數(shù)資料
型號: KSZ8851SNL-BBE-EVAL
廠商: Micrel Inc
文件頁數(shù): 21/80頁
文件大?。?/td> 0K
描述: BOARD EVAL MAC/PHY FOR KSZ8851
軟件下載: KSZ8851SNL Linux Driver
Linus' GIT Repo
View Driver
設(shè)計(jì)資源: Zippy2 Schematic
BeagleBoard Zippy2
KSZ8851SNL-BBE-EVAL Bill of Materials
特色產(chǎn)品: Zippy 2
標(biāo)準(zhǔn)包裝: 1
系列: LinkMD®
主要目的: 接口,以太網(wǎng)控制器(PHY 和 MAC)
嵌入式:
已用 IC / 零件: KSZ8851SNL
主要屬性: 1 個(gè)端口,100BASE-TX/10BASE-T
次要屬性: SPI 接口,LinkMD 線纜診斷
已供物品: 板,硬件
產(chǎn)品目錄頁面: 1114 (CN2011-ZH PDF)
其它名稱: 576-3602
KSZ8851SNL-BBE-EVL
ZIPPY2
Micrel, Inc.
KSZ8851SNL/SNLI
August 2009
28
M9999-083109-2.0
Figure 12. Host TX Multiple Frames in Auto- Enqueue Flow Diagram
Host receives an multiple Ethernet pkts
from upper layer and prepares transmit
pkts data (data, data_length, frame
ID). Each transmit queue frame format
is shown in Table 6
Write an 1?to TXQCR[2] reg
to issue a transmit command (auto-
enqueue) to the TXQ. The TXQ will
transmit all data to the PHY port
Check if KSZ8851SNL TXQ
Memory size is available for these
transmit pkts?
(Read TXMIR Reg)
Write an 1?to RXQCR[3] reg to enable
TXQ write access, then Host issues a
SPI opcode=11 to start write transmit
data (control word, byte count and pkt
data) to TXQ memory. This is moving
transmit data from Host to
KSZ8851SNL TXQ memory until all
pkts are finished
Write an 0?to RXQCR[3] reg to end
TXQ write access
Option to read ISR[14] reg, it indicates
that the TXQ has completed to transmit
all pkts to the PHY port, then
Write 1?to clear this bit
Yes
No
Write the total amount of TXQ buffer
space which is required for next
transmit total frames size in double-
word count in TXNTFSR[15:0] register
Set bit 1=1 in TXQCR register to
enable the TXQ memory available
monitor
Wait for interrupt
and check if the bit 6=1
(memory space available)
in ISR register
?
Yes
No
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