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參數(shù)資料
| 型號： | KSZ8851SNL-BBE-EVAL |
| 廠商： | Micrel Inc |
| 文件頁數(shù)： | 3/80頁 |
| 文件大?。?/td> | 0K |
| 描述： | BOARD EVAL MAC/PHY FOR KSZ8851 |
| 軟件下載： | KSZ8851SNL Linux Driver Linus' GIT Repo View Driver |
| 設(shè)計資源： | Zippy2 Schematic BeagleBoard Zippy2 KSZ8851SNL-BBE-EVAL Bill of Materials |
| 特色產(chǎn)品： | Zippy 2 |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 系列： | LinkMD® |
| 主要目的： | 接口，以太網(wǎng)控制器（PHY 和 MAC） |
| 嵌入式： | 否 |
| 已用 IC / 零件： | KSZ8851SNL |
| 主要屬性： | 1 個端口，100BASE-TX/10BASE-T |
| 次要屬性： | SPI 接口，LinkMD 線纜診斷 |
| 已供物品： | 板，硬件 |
| 產(chǎn)品目錄頁面： | 1114 (CN2011-ZH PDF) |
| 其它名稱： | 576-3602 KSZ8851SNL-BBE-EVL ZIPPY2 |
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Micrel, Inc.
KSZ8851SNL/SNLI
August 2009
11
M9999-083109-2.0
Pin Description
Pin Number
Pin Name
Type
Pin Function
1
LED0
Opu
Programmable LED output to indicate PHY activity/status.
LED is ON when output is LOW; LED is OFF when output is HIGH.
LED indicators
1 defined as follows:
Chip Global Control Register: CGCR bit [9]
0 (Default)
1
LED1 (pin 32)
100BT
ACT
LED0 (pin 1)
LINK/ACT
LINK
Link (up) = LED On; Activity = LED Blink; Link/Act = LED On/Blink;
Speed = LED On (100BASE-T); LED Off (10BASE-T)
2
PME
Opu
Power Management Event (default active low)
It is asserted (low or high depends on polarity set in PMECR register) when one of the
wake-on-LAN events is detected by KSZ8851SNL. The KSZ8851SNL is requesting the
system to wake up from low power mode.
3
INTRN
Opu
Interrupt Not
An active low signal to host CPU to indicate an interrupt status bit is set. This pin needs
an external 4.7K pull-up resistor.
4
DGND
Gnd
Digital IO ground.
5
VDD_CO1.8
P
1.8V regulator output . This 1.8V output pin provides power to pins 9 (VDD_A1.8) and 23
(VDD_D1.8) for core VDD supply.
If VDD_IO is set for 1.8V then this pin should be left floating, pins 9 (VDDA_1.8) and 23
(VDD_D1.8) will be sourced by the external 1.8V supply that is tied to pins 25 and 30
(VDD_IO) with appropriate filtering.
6
EED_IO
Ipd/O
In/Out Data from/to external EEPROM
Config Mode: The pull-up/pull-down value is latched as with/without EEPROM during
power-up / reset. See “Strapping Options” section for details.
7
EESK
Opd
EEPROM Serial Clock
A 4
μs (OBCR[1:0]=11 on-chip bus speed @ 25MHz) or 800ns (OBCR[1:0]=00 on-chip
bus speed @ 125 MHz) serial output clock to load configuration data from the serial
EEPROM.
8
AGND
Gnd
Analog ground.
9
VDD_A1.8
P
1.8V analog power supply from VDD_CO1.8 (pin 5) with appropriate filtering. If VDD_IO is
1.8V, this pin must be supplied power from the same source as pins 25 and 30 (VDD_IO)
with appropriate filtering.
10
EECS
Opd
EEPROM Chip Select
This signal is used to select an external EEPROM device.
11
RXP
I/O
Physical receive (MDI) or transmit (MDIX) signal (+ differential).
12
RXM
I/O
Physical receive (MDI) or transmit (MDIX) signal (– differential).
13
AGND
Gnd
Analog ground.
14
TXP
I/O
Physical transmit (MDI) or receive (MDIX) signal (+ differential).
15
TXM
I/O
Physical transmit (MDI) or receive (MDIX) signal (– differential).
16
VDD_A3.3
P
3.3V analog VDD input power supply with well decoupling capacitors.
17
ISET
O
Set physical transmits output current.
Pull-down this pin with a 3.01K 1% resistor to ground.
18
AGND
Gnd
Analog ground.
19
RSTN
Ipu
Reset Not.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| KSZ8851SNL-BBE-EVL | 制造商:Micrel Inc 功能描述:BOARD EVAL MAC/PHY FOR KSZ8851 |
| KSZ8851SNL-EVAL | 功能描述:以太網(wǎng)開發(fā)工具 Single Ethernet Port + SPI Bus Interface(Lead Free) Eval Board RoHS:否 制造商:Micrel 產(chǎn)品:Evaluation Boards 類型:Ethernet Transceivers 工具用于評估:KSZ8873RLL 接口類型:RMII 工作電源電壓: |
| KSZ8851SNL-EVAL | 制造商:Micrel Inc 功能描述:BOARD EVALUATION FOR KSZ8851SNL |
| KSZ8851SNLI TR | 功能描述:以太網(wǎng) IC 10/100BT Ethernet MAC + PHY with SPI Bus Interface (I-Temp, Lead free) RoHS:否 制造商:Micrel 產(chǎn)品:Ethernet Switches 收發(fā)器數(shù)量:2 數(shù)據(jù)速率:10 Mb/s, 100 Mb/s 電源電壓-最大:1.25 V, 3.45 V 電源電壓-最小:1.15 V, 3.15 V 最大工作溫度:+ 85 C 封裝 / 箱體:QFN-64 封裝:Tray |
| KSZ8851SNLITR | 制造商:Micrel 功能描述:Ethernet Controller Single Chip 100Mbps |
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