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參數(shù)資料
| 型號(hào)： | KAB02D100M-TLGP |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | Tantalum Conformal-Coated Capacitor; Capacitance: 22uF; Voltage: 10V; Packaging: Tape & Reel |
| 中文描述： | 多芯片封裝存儲(chǔ)器 |
| 文件頁(yè)數(shù)： | 71/72頁(yè) |
| 文件大?。?/td> | 1378K |
| 代理商： | KAB02D100M-TLGP |
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KAB0xD100M - TxGP
Revision 1.11
August 2003
- 71 -
MCP MEMORY
SEC Only
Figure 31.
CS
U
WE
Address
Over 4
μ
s
tRC
toggle CS
U
to high every 4
μ
s
CS
U
WE
Address
tWP
Over 4
μ
s
tWC
Write operation has similar restriction to Read operation. If your
system has a timing which sustains invalid states over
4
μ
s at
write mode and has continuous write signals with length of Min.
tWC over
4
μ
s like Figure 32, you must toggle WE once to high
Figure 33.
Figure 32.
CS
U
WE
Address
tWP
Over 4
μ
s
tWC
tRC
Figure 34.
CS
U
WE
Address
tWP
Over 4
μ
s
tWC
tRC
and make it stay high at least for tRC every
4
μ
s or toggle CS
U
once to high for about tRC.
toggle CS
U
to high every 4
μ
s
toggle WE to high and make it stay high at least for tRC every 4
μ
s
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