參數(shù)資料
型號： KAB02D100M-TLGP
廠商： SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述： Tantalum Conformal-Coated Capacitor; Capacitance: 22uF; Voltage: 10V; Packaging: Tape & Reel
中文描述： 多芯片封裝存儲器
文件頁數(shù)： 17/72頁
文件大?。?/td> 1378K
代理商： KAB02D100M-TLGP
KAB0xD100M - TxGP
Revision 1.11
August 2003
- 17 -
MCP MEMORY
SEC Only
NOR FLASH DEVICE OPERATION
Byte/Word Mode
If the BYTE pin is set at logical "1" , the device is in word mode, DQ0-DQ15 are active. Otherwise the BYTE pin is set at logical "0" ,
the device is in byte mode, DQ0-DQ7 are active. DQ8-DQ14 are in the High-Z state and DQ15 pin is used as an input for the LSB (A-
1) address pin.
Read Mode
The NOR Flash memory is controlled by Chip Enable (CE
R
), Output Enable (OE) and Write Enable (WE). When CE
R
and OE are
low and WE is high, the data stored at the specified address location,will be the output of the device. The outputs are in high imped-
ance state whenever CE
R
or OE is high.
Standby Mode
The NOR Flash memory features Stand-by Mode to reduce power consumption. This mode puts the device on hold when the device
is deselected by making CE
R
high (CE
R
= V
IH
). Refer to the DC characteristics for more details on stand-by modes.
Output Disable
The device outputs are disabled when OE is High (OE = V
IH
). The output pins are in high impedance state.
Automatic Sleep Mode
The NOR Flash Memory features Automatic Sleep Mode to minimize the device power consumption. Since the device typically draws
5
μ
A of the current in Automatic Sleep Mode, this feature plays an extremely important role in battery-powered applications. When
addresses remain steady for t
AA
+50ns, the device automatically activates the Automatic Sleep Mode. In the sleep mode, output data
is latched and always available to the system. When addresses are changed, the device provides new data without wait time.
Data
Outputs
t
AA
+ 50ns
Data
Auto Sleep Mode
Address
Data
Data
Data
Data
Figure 3. Auto Sleep Mode Operation
Autoselect Mode
The NOR Flash memory offers the Autoselect Mode to identify manufacturer and device type by reading a binary code. The Autose-
lect Mode allows programming equipment to automatically match the device to be programmed with its corresponding programming
algorithm. In addition, this mode allows the verification of the status of write protected blocks.
The manufacturer and device code can
be read via the command register. The Command Sequence is shown in Table 5 and Figure 4. The autoselect operation of block pro-
tect verification is initiated by first writing two unlock cycle. The third cycle must contain the bank address and autoselect command
(90H). If Block address while (A6, A1, A0) = (0,1,0) is finally asserted on the address ball, it will produce a logical "1" at the device
output DQ0 to indicate a write protected block or a logical "0" at the device output DQ0 to indicate a write unprotected block. To ter-
minate the autoselect operation, write Reset command (F0H) into the command register.
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