參數(shù)資料
型號: ISP1362BD
廠商: NXP SEMICONDUCTORS
元件分類: 總線控制器
英文描述: Single-chip Universal Serial Bus On-The-Go controller
中文描述: UNIVERSAL SERIAL BUS CONTROLLER, PQFP64
封裝: 10 X 10 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT-314-2, LQFP-64
文件頁數(shù): 71/150頁
文件大小: 647K
代理商: ISP1362BD
Philips Semiconductors
ISP1362
Single-chip USB OTG controller
Product data
Rev. 03
06 January 2004
71 of 150
9397 750 12337
Koninklijke Philips Electronics N.V. 2004. All rights reserved.
15.1 HC control and status registers
15.1.1
HcRevision register (R: 00H)
The bit allocation of the HcRevision register is given in
Table 35
.
Code (Hex): 00
read only
15.1.2
HcControl register (R/W: 01H/81H)
The HcControl register de
fi
nes the operating modes for the HC. The RWE bit is
modi
fi
ed only by the HCD.
Table 37
shows the bit allocation of the register.
Code (Hex): 01
read
Code (Hex): 81
write
Table 35:
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
HcRevision register: bit allocation
31
30
29
28
27
26
25
24
reserved
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
23
22
21
20
19
18
17
16
reserved
-
-
-
-
-
-
-
-
-
-
-
-
-
-
9
-
-
8
15
14
13
12
11
10
reserved
-
-
7
-
-
6
-
-
5
-
-
4
-
-
3
-
-
2
-
-
1
-
-
0
REV[7:0]
0
R
0
R
0
R
1
R
0
R
0
R
0
R
1
R
Table 36:
Bit
31 to 8
7 to 0
HcRevision register: bit description
Symbol
Description
Reserved
REV[7:0]
Revision:
This read-only
fi
eld contains the Binary-Coded Decimal
(BCD) representation of the version of the HCI speci
fi
cation that is
implemented by this HC. For example, a value of 11H corresponds
to version 1.1. All HC implementations that are compliant with this
speci
fi
cation need to have a value of 11H.
Table 37:
Bit
Symbol
Reset
Access
HcControl register: bit allocation
31
30
29
28
27
26
25
24
reserved
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
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