參數(shù)資料
型號: ISP1362BD
廠商: NXP SEMICONDUCTORS
元件分類: 總線控制器
英文描述: Single-chip Universal Serial Bus On-The-Go controller
中文描述: UNIVERSAL SERIAL BUS CONTROLLER, PQFP64
封裝: 10 X 10 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT-314-2, LQFP-64
文件頁數(shù): 19/150頁
文件大?。?/td> 647K
代理商: ISP1362BD
Philips Semiconductors
ISP1362
Single-chip USB OTG controller
Product data
Rev. 03
06 January 2004
19 of 150
9397 750 12337
Koninklijke Philips Electronics N.V. 2004. All rights reserved.
The buffer memory is con
fi
gured by the DcEndpointCon
fi
guration registers (ECRs).
Although the control endpoint has a
fi
xed con
fi
guration, all 16 endpoints (control OUT,
control IN and 14 programmable endpoints) must be con
fi
gured before the DC
internally allocates the buffer. The 14 programmable endpoints could be programmed
into sizes ranging from 16 bytes to 1023 bytes, single or double buffering.
The DC buffer memory for each endpoint can be accessed through the
DcReadEndpointBuffer and DcWriteEndpointBuffer registers.
9.2 PIO access mode
The ISP1362 provides the PIO mode for external microprocessors to access its
internal control registers and buffer memory. It occupies only four I/O ports or four
memory locations of a microprocessor. An external microprocessor can read or write
to the internal control registers and buffer memory of the ISP1362 through the PIO
operating mode.
Figure 8
shows the PIO interface between a microprocessor and the
ISP1362.
Fig 7.
DC buffer memory organization.
004aaa057
Control OUT (64 bytes)
Endpoint 1 (128 bytes)
Endpoint 2 (128 bytes)
Endpoint 3 (512 bytes)
Endpoint 4 (64 bytes)
Control IN (64 bytes)
Endpoint 5 (64 bytes)
Endpoint 6 (96 bytes)
Endpoint 7 (96 bytes)
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