參數(shù)資料
型號： ISP1362BD
廠商： NXP SEMICONDUCTORS
元件分類： 總線控制器
英文描述： Single-chip Universal Serial Bus On-The-Go controller
中文描述： UNIVERSAL SERIAL BUS CONTROLLER, PQFP64
封裝： 10 X 10 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT-314-2, LQFP-64
文件頁數(shù)： 123/150頁
文件大小： 647K
代理商： ISP1362BD
Philips Semiconductors
ISP1362
Single-chip USB OTG controller
Product data
Rev. 03
—
06 January 2004
123 of 150
9397 750 12337
Koninklijke Philips Electronics N.V. 2004. All rights reserved.
16.2.7
Acknowledge Set-up (F4H)
This command acknowledges to the host that a Set-up packet was received. The
arrival of a Set-up packet disables the Validate Buffer and Clear Buffer commands for
the control IN and OUT endpoints. The microprocessor needs to re-enable these
commands by sending an Acknowledge Set-up command, see
Section 13.3.6
.
Code (Hex): F4
—
acknowledge set-up
Transaction
—
none (code only)
16.3 General commands
16.3.1
Read Endpoint Error Code(R: A0H
–
AFH)
This command returns the status of the last transaction of the selected endpoint, as
stored in the DcErrorCode register. Each new transaction overwrites the previous
status information. The bit allocation of the DcErrorCode register is shown in
Table 128
.
Code (Hex): A0 to AF
—
read error code (control OUT, control IN, endpoint 1 to 14)
Transaction
—
read 1 byte (code or data)
3
OVERWRITE
This bit is set by hardware. Logic 1 indicates that a new Set-up
packet has overwritten the previous set-up information, before it
was acknowledged or before the endpoint was stalled. This bit is
cleared by reading, if writing the set-up data has
fi
nished.
Firmware must check this bit before sending an Acknowledge
Set-up command or stalling the endpoint. Upon reading logic 1,
the
fi
rmware must stop ongoing set-up actions and wait for a
new Set-up packet.
Logic 1 indicates that the buffer contains a Set-up packet.
This bit indicates which buffer is currently selected for CPU
access (0 = primary buffer; 1 = secondary buffer).
reserved
2
1
SETUPT
CPUBUF
0
-
Table 127: DcEndpointStatusImage register: bit description
…
continued
Bit
Symbol
Description
Table 128: DcErrorCode register: bit allocation
Bit
7
Symbol
UNREAD
Reset
0
Access
R
6
5
4
3
2
1
0
DATA01
0
R
reserved
-
-
ERROR[3:0]
RTOK
0
R
0
R
0
R
0
R
0
R
Table 129: DcErrorCode register: bit description
Bit
Symbol
7
UNREAD
Description
Logic 1 indicates that a new event occurred before the previous
status was read.
This bit indicates the PID type of the last successfully received
or transmitted packet (0 = DATA0 PID; 1 = DATA1 PID).
6
DATA01
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參數(shù)描述
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ISP1362BD,157 功能描述:USB 接口集成電路 USB OTG CONTROLLER RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:WLCSP-20
ISP1362BD157 制造商:NXP Semiconductors 功能描述:IC CONTROLLER USB-OTG 64LQFP 制造商:ST-Ericsson 功能描述:IC CONTROLLER USB OTG 64-LQFP
ISP1362BDFA 功能描述:IC USB OTG CONTROLLER 64-LQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 控制器 系列:- 標準包裝:4,900 系列:- 控制器類型:USB 2.0 控制器 接口:串行 電源電壓:3 V ~ 3.6 V 電流 - 電源:135mA 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:36-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:36-QFN（6x6） 包裝:* 其它名稱:Q6396337A
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