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參數(shù)資料
| 型號： | HTG2150 |
| 廠商： | Holtek Semiconductor Inc. |
| 英文描述： | 8-Bit 320 Pixel LCD Microcontroller |
| 中文描述： | 8位微控制器320像素LCD |
| 文件頁數(shù)： | 20/49頁 |
| 文件大小： | 316K |
| 代理商： | HTG2150 |
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HTG2150
20
July 24, 2000
Preliminary
When the timer counter (reading TMR0H) is
read, the clock will be blocked to avoid er-
rors. As this may results in a counting error,
this must be taken into consideration by the
programmer.
Timer 2/3
Timer 2 is an 8-bit counter, and its clock source
comes from the system clock divided by an
8-stage prescaler. There are two registers re-
lated to Timer 2 ; TMR2 (21H) and TMR2C
(22H). Two physical registers are mapped to
TMR2 location; writing TMR2 makes the start-
ingvaluebeplacedintheTimer2preloadregis-
ter and reading the TMR2 gets the contents of
the Timer 2 counter. The TMR2C is a control
register, which defines the division ratio of the
prescaler and counting enable or disable.
Writing data to B2, B1 and B0 (bits 2, 1, 0 of
TMR2C) can yield various clock sources.
Once the Timer 2 starts counting, it will count
from the current contents in the counter to
FFH. Once an overflow occurs, the counter is
reloaded from a preload register, and generates
an interrupt request flag (T2F; bit 4 of INTCH).
To enable the counting operation, the timer On
bit (TON; bit 4 of TMR2C) should be set to 1 .
For proper operation, bit 6 of TMR2C should be
set to 1 and bit 3, bit7 should be set to 0 .
The Timer 2 can also be used as PFD output by
setting PWM1 and PWM2 to be PFD and PFDB
output respectively by 2FH.7 and 2FH.6. When
the PFD/PFDB function is selected, setting
2FH.4/2FH.5 to 1 will enable the PFD/PFDB
output and setting 2FH.4/2FH.5 to 0 will dis-
able the PFD/PFDB output. PFD Frequency:
T2f/[256-TMR2) 2]
Timer 3 has the same structure and operating
manner with Timer 2, except for clock source
and PFD function. The Timer 3 can be used as a
time base to generate a regular internal inter-
rupt. The clock source of Timer 3 can come from
RTC OSC (X TAL 32kHz) or system clock di-
vided by an 8-stage prescaler. If the RTC mask
option is enabled, a 32kHz crystal is needed
across XIN and XOUT pins. The 32kHz signal
is processed by an 8-stage prescaler to yield
various counting clock for Timer 3. There are 2
registers related to Timer 3; TMR3 (24H) and
TMR3C(25H).WritingdatatoB2,B1,B0(bit2,
1,0ofTMR3C)canyieldvariouscountingclock.
Label
Bits
Function
0~2
Unused bits, read as 0 .
TE
3
To define the TMR0 active edge of the timer counter
(0=active on low to high; 1=active on high to low)
TON
4
To enable/disable timer counting (0=disabled; 1=enabled)
5
Unused bits, read as x .
TM0, TM1
6, 7
0, 1=Internal clock
TMR0C register
* !
7 *
* !
* 8
7
1 ' 7 F
*
% F * 8 $
8 ' '
$
7 @ +
Timer counter 0
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