參數(shù)資料
型號(hào)： HT82A832R
廠商： Holtek Semiconductor Inc.
英文描述： Basic USB Phone OTP MCU
中文描述： 檢察官辦公室的基本USB電話單片機(jī)
文件頁(yè)數(shù)： 24/51頁(yè)
文件大?。?/td> 345K
代理商： HT82A832R
HT82A832R
Rev. 1.00
24
July 18, 2006
Digital PGA
Bit No.
Label
Functions
0~5
PGA0~PGA5
There are six bits to control the digital PGA (0~19.5 dB). The PGA is a digital amplifier
used to amplify the 16-bit data that comes from the PCM ADC. The PGA value versus
gain relationship is shown in the follow table.
6
Undefined bit, read as 0 .
7
MUTE_MKB
Microphone mute Control:
MUTE_MKB =0: Mute microphone input.
MUTE_MKB =1: Normal.
PGA_CTRL (30H) Register
PGA_CRTL Value (PGA5~PGA0)
Gain (dB)
000000
0
000001
0.5
:
:
:
:
100111
19.5
101000
19.5
:
:
:
:
111111
19.5
PFD Control
Label
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
PFDC
0
PRES1
PRES0
PFDEN
0
0
PFD_IO
SELW
PFDD
PFDD7
PFDD6
PFDD5
PFDD4
PFDD3
PFDD2
PFDD1
PFDD0
The PFD (programmable frequency divider) is implemented in the HT82A832R. It is composed of two portions: a
prescaler and a general counter.
Theprescaleriscontrolledbytheregisterbits,PRES0andPRES1.The4-stageprescalerisdividedby16.Thegeneral
counter is programmed by an 8-bit register PFDD.
The PFDD is inhibited to write while the PFD is disabled. To modify the PFDD contents, the PFD must be enabled.
When the generator is disabled, the PFDD is cleared by hardware.
PFD prescaler selection:
PRES1
PRES0
Prescaler Output
0
0
PFD frequency source
1
0
1
PFD frequency source
2
1
0
PFD frequency source
4
1
1
PFD frequency source
8
The bit PFD_IO is used to determine whether PC0 is a general purpose I/O port or a PFD output.
Label
Functions
PFD_IO=1
PC0 is PFD output
PFD_IO=0
PC0 is a general purpose IO Port (Default =0)
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