參數(shù)資料
型號： HT82A832R
廠商： Holtek Semiconductor Inc.
英文描述： Basic USB Phone OTP MCU
中文描述： 檢察官辦公室的基本USB電話單片機(jī)
文件頁數(shù)： 21/51頁
文件大?。?/td> 345K
代理商： HT82A832R
HT82A832R
Rev. 1.00
21
July 18, 2006
Bit No.
Label
R/W
Power-on
Functions
0
ASET
R/W
0
This bit is used to configure the SIE to automatically change the device
address by the value stored in the AWR register. When this bit is set to 1
by firmware, the SIE will update the device address by the value stored in
the AWR register after the PC host has successfully read the data from the
device by an IN operation. Otherwise, when this bit is cleared to 0 , the SIE
will update the device address immediately after an address is written to the
AWR register. So, in order to work properly, the firmware has to clear this bit
after a next valid SETUP token is received.
1
ERR
R/W
0
This bit is used to indicate that some errors have occurred when the FIFO0
is accessed. This bit is set by SIE and should be cleared by firmware.
2
OUT
R/W
0
This bit is used to indicate the OUT token (except the OUT zero length
token) has been received. The firmware clears this bit after the OUT data
has been read. Also, this bit will be cleared by SIE after the next valid
SETUP token is received.
3
IN
R
0
This bit is used to indicate the current USB receiving signal from PC host is
an IN token.
4
NAK
R
0
This bit is used to indicate the SIE is a transmitted NAK signal to the host in
response to the PC host IN or OUT token.
5
CRCF
R/W
0
ErrorconditionfailureflagincludeCRC,PID,nointegratetokenerror,CRCF
will be set by hardware and the CRCF need to be cleared by firmware.
6
EOT
R
1
Token pakcage active flag, low active.
7
NMI
R/W
0
NAK token interrupt mask flag. If this bit set, when the device sent a NAK
token to the host, an interrupt will be disabled. Otherwise if this bit is cleared,
when the device sends a NAK token to the host, it will enter the interrupt
sub-routine.
SIES (25H) Register
TheMISCregistercombinescommandandstatustocontrolthedesiredendpointFIFOactionandtoshowthestatusof
the desired endpoint FIFO. MISC will be cleared by a USB reset signal.
Bit No.
Label
R/W
Power-on
Functions
0
REQUEST
R/W
0
After setting the status of the desired one, FIFO can be requested by
setting this bit high . After finishing, this bit must be set low.
1
TX
R/W
0
To represent the direction and transition end MCU access. When set to
logic 1, the MCU desires to write data to the FIFO. After finishing, this bit
must be set to logic 0 before terminating request to represent transition
end. For an MCU read operation, this bit must be set to logic 0 and set to
logic 1 after finishing.
2
CLEAR
R/W
0
MCU requests to clear the FIFO, even if the FIFO is not ready. After
clearing the FIFO, the USB interface will send force_tx_err to tell the
Host that data under-run if the Host wants to read data.
3
ISO_IN_EN
R/W
0
Enables the isochronous in pipe interrupt.
4
ISO_OUT_EN
R/W
0
Enables the isochronous out pipe interrupt.
5
SETCMD
R/W
0
To show that the data in the FIFO is a setup command. This bit will
remain in this state until the next one enters the FIFO.
6
READY
R
0
To show that the desired FIFO is ready
7
LEN0
R
0
To show that the host sent a 0-sized packet to the MCU. This bit must be
cleared by a read action to the corresponding FIFO.
MISC (26H) Register
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參數(shù)描述
HT82A832R_07 制造商:HOLTEK 制造商全稱:Holtek Semiconductor Inc 功能描述:USB Audio MCU
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