- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄385400 > HT48E50 (Holtek Semiconductor Inc.) I/O Type 8-Bit MTP MCU With EEPROM PDF資料下載
參數(shù)資料
| 型號： | HT48E50 |
| 廠商： | Holtek Semiconductor Inc. |
| 英文描述： | I/O Type 8-Bit MTP MCU With EEPROM |
| 中文描述： | I / O型8位微控制器帶有EEPROM中期計劃 |
| 文件頁數(shù)： | 13/46頁 |
| 文件大?。?/td> | 303K |
| 代理商： | HT48E50 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁當(dāng)前第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁
HT48E50
Rev. 0.00
13
September 29, 2004
Preliminary
The contents of the on-chip RAM and registers remain
unchanged.
WDT and WDT prescaler will be cleared and re-
counted again (if the WDT clock is from the WDT os-
cillator).
All of the I/O ports maintain their original status.
The PDF flag is set and the TO flag is cleared.
The system can leave the HALT mode by means of an
external reset, an interrupt, an external falling edge sig-
nal on port A or a WDT overflow. An external reset
causes a device initialization and the WDToverflow per-
forms a warm reset . After the TO and PDF flags are
examined, the reason for chip reset can be determined.
The PDF flag is cleared by a system power-up or exe-
cuting the CLR WDT instruction and is set when exe-
cuting the HALT instruction. The TO flag is set if the
WDT time-out occurs, and causes a wake-up that only
resets the PC and SP; the others remain in their original
status.
The port A wake-up and interrupt methods can be con-
sidered as a continuation of normal execution. Each bit
in port A can be independently selected to wake up the
device by options. Awakening from an I/O port stimulus,
the program will resume execution of the next instruc-
tion. If it awakens from an interrupt, two sequence may
occur. If the related interrupt is disabled or the interrupt
is enabled but the stack is full, the program will resume
execution at the next instruction. If the interrupt is en-
abled and the stack is not full, the regular interrupt re-
sponse takes place. If an interrupt request flag is set to
1 before entering the HALT mode, the wake-up func-
tion of the related interrupt will be disabled. Once a
wake-up event occurs, it takes 1024 t
SYS
(system clock
period) to resume normal operation. In other words, a
dummy period will be inserted after a wake-up. If the
wake-up results from an interrupt acknowledge signal,
the actual interrupt subroutine execution will be delayed
by one or more cycles. If the wake-up results in the next
instruction execution, this will be executed immediately
after the dummy period is finished.
To minimize power consumption, all the I/O pins should
be carefully managed before entering the HALT status.
Reset
There are three ways in which a reset can occur:
RES reset during normal operation
RES reset during HALT
WDT time-out reset during normal operation
The WDT time-out during HALT is different from other
chip reset conditions, since it can perform a warm re -
set thatresetsonlythePCandSP,leavingtheothercir-
cuits in their original state. Some registers remain un-
changed during other reset conditions. Most registers
are reset to the initial condition when the reset condi-
tions are met. By examining the PDF and TO flags, the
programcandistinguishbetweendifferent chipresets .
TO PDF
RESET Conditions
0
0
RES reset during power-up
u
u
RES reset during normal operation
0
1
RES wake-up from HALT mode
1
u
WDT time-out during normal operation
1
1
WDT wake-up from HALT mode
Note: u stands for unchanged
To guarantee that the system oscillator is started and
stabilized, the SST (System Start-up Timer) provides an
extra-delay of 1024 system clock pulses when the sys-
tem reset (power-up, WDT time-out or RES reset) or the
system awakes from the HALT state.
When a system reset occurs, the SST delay is added
during the reset period. Any wake-up from HALT will en-
able the SST delay.
An extra option load time delay is added during system
reset (power-up, WDT time-out at normal mode or RES
reset).
=
=
E
9 F
E
9 F
Reset Circuit
Note:
* Make the length of the wiring, which is con-
nected to the RES pin as short as possible, to
avoid noise interference.
*
+
"
*
% (
'
"
"
+
"
; > $ " +
$ # #
! "
Reset Configuration
"
+ $
; "
) $ # + +
"
Reset Timing Chart
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| HT48R05A-1 | 8-Bit High Performance RISC-like OTP Microcontroller(8位、高性能、類似RISC、一次可編程微控制器，用于多I/O接口設(shè)備) |
| HT48R05A | 8-Bit OTP Microcontroller |
| HT48R06A-1 | 8-Bit High Performance RISC-like OTP Microcontroller(8位、高性能、類似RISC、一次可編程微控制器，用于多I/O接口設(shè)備) |
| HT48R10A-1 | 8-Bit High Performance RISC-like Microcontroller Suitable for Multiple I/O Application(高性能、指令類似RISC的8位微控制器，用于多I/O接口設(shè)備) |
| HT48R10A | 8-BIT MICROCONTROLLER |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HT48E70 | 制造商:HOLTEK 制造商全稱:Holtek Semiconductor Inc 功能描述:I/O Type 8-Bit MTP MCU With EEPROM |
| HT48F06E | 制造商:HOLTEK 制造商全稱:Holtek Semiconductor Inc 功能描述:I/O Flash Type MCU with EEPROM |
| HT48F06E_09 | 制造商:HOLTEK 制造商全稱:Holtek Semiconductor Inc 功能描述:I/O Flash Type MCU with EEPROM |
| HT48F06E-18DIPLF | 制造商:Holtek Semiconductor Inc 功能描述:8BIT MCU 1K FLASH 1K EEPROM DIP |
| HT48F10E | 制造商:HOLTEK 制造商全稱:Holtek Semiconductor Inc 功能描述:I/O Flash Type MCU with EEPROM |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。