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| 型號： | HSP3824 |
| 廠商： | HARRIS SEMICONDUCTOR |
| 元件分類： | 無繩電話/電話 |
| 英文描述： | () |
| 中文描述： | TELECOM, CELLULAR, BASEBAND CIRCUIT |
| 文件頁數(shù)： | 1/18頁 |
| 文件大?。?/td> | 442K |
| 代理商： | HSP3824 |
1
AN9615
Using the HSP3824 Evaluation Board and
Associated Software
Introduction
This application note describes the Intersil PRISM
Evaluation Board and its associated evaluation software
referred to as the SW. This covers a functional overview of
the software interface with a description of the user screen
layout philosophy. It includes a description of the
configuration form and of the self-test utility.
The evaluation board SW supports (but does not require) the
Intersil HSP3824 evaluation boards.
For details on the operation of the HSP3824, refer to the
datasheet entitled “HSP3824 Direct Sequence Spread
Spectrum Baseband Processor.”
The evaluation board kit includes the hardware PC board, a
copy of the configuration SW, cabling required for external
interfaces including the cable required for the computer
interface, the HSP3824 Datasheet and this evaluation board
application note. Each of the PC boards has one HSP3824
device.
The power supplies and clock sources are provided
externally. The SW runs on any PC with Windows 3.1 or
95. The PC interfaces with the evaluation board through its
parallel port. There is no signal processing done at the PC.
The PC interface is required as the user interface to
configure the HSP3824 into its various modes of operation
and to monitor the data from the internal registers of the
HSP3824.
External Interfaces
The following external hardware interfaces are required as
shown on the block diagram of Figure 1.
PC Interface
This interface is between the parallel PC port and J3B of the
evaluation board. The cable for this interface is provided by
Intersil as part of the evaluation kit. The interface is for
programming the registers on the HSP3824.
Power Supply Interface
There is a single power supply connection for the entire
evaluation board. The cabling that connects with the external
supply is already provided on the board. Refer to the
HSP3824 Datasheet for supply voltage specifications.
Clock Interface
The clock is provided through an external source at the SMA
connector J11 of the evaluation board. The board has a 50
resistor on the clock input and is intended for operation with
a programmable signal source such as the HP8165A. A
typical clock is 5V
P-P
with 2.5V offset (i.e., CMOS levels) for
5V operation.
Note For Power and Clock Interfaces:
The evaluation board contains an ACTEL configurable gate
array that interfaces the computer to the HSP3824. This
device is rated only to 10MHz clock with a 5V supply and
may fail to perform if it is used over the full HSP3824 voltage
and clock rate ranges (i.e., 22MHz at 3V). The ACTEL can
normally be programmed at 22MHz, but it is recommended
not to exceed its ratings. During programming, the
evaluation board clock should not exceed 10MHz and the
voltage should be set at 5V.
After programming, the user can increase the clock rate and
vary the voltage as required for the evaluation tests of the
HSP3824.
Analog Inputs Interfaces
These interfaces are the analog inputs to the HSP3824 A/Ds.
They are provided through SMA connectors or through JP
5
on
the evaluation board. The SMA connectors are labeled on the
board according to their corresponding signal name. That is
I
IN
for the in phase component of the complex baseband
analog waveform, Q
IN
for the Quadrature component of the
complex baseband waveform and RSSI for the analog RSSI
input. The electrical characteristics of these interfaces are
included in the HSP3824 Datasheet. These can be 50
terminated on the board with jumpers if desired. For
POWER
SUPPLY
CONTROL PORT
CLK
I
IN
, Q
IN
,
RSSI
TEST POINTS
HSP3824 EVAL BOARD
TDX, RXD,
TXC, RXC
I
OUT
, Q
OUT
TX/RX
CONTROLLER
CONTROLLER
HSP3824
PC
FIGURE 1. HSP3824 EVALUATION BOARD TOP LEVEL
INTERFACE BLOCK DIAGRAM
JP
2
, JP
3
J
3B
V
CC
, GND
J
11
I
IN
, Q
IN
,
RSSI
JP
1
, JP
4
, JP
5
JP
1
Application Note
April 1996
Carl Andren, John Fakatselis (Intersil Corporation) and Eric Turner (Squires Engineering
www.intersil.com or 407-727-9207
|
Copyright
Intersil Corporation 1999
PRISM and PRISM logo are trademarks of Intersil Corporation.
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