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參數(shù)資料
| 型號： | HMS97C8032 |
| 廠商： | HYNIX SEMICONDUCTOR INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | H8/SLP Series, 38799 Group, 4-ch 14-bit PWM, 2-ch 16-bit TPU, 16-bit AEC, RTC FP-100U; Vcc= 1.8 to 3.6 volts, Temp= -20 to 75 C; Package: PLQP0100KB-A |
| 中文描述： | 8-BIT, OTPROM, 10 MHz, MICROCONTROLLER, PQFP80 |
| 封裝： | PLASTIC, MQFP-80 |
| 文件頁數(shù)： | 82/86頁 |
| 文件大?。?/td> | 1508K |
| 代理商： | HMS97C8032 |
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HMS91C7134
82
November.2001 ver1.0
22. INSTRUCTION SET
The HMS9xC7134 uses a powerful instruction set which permits
the expansion of on-chip CPU peripherals and optimizes byte ef-
ficiency and execution speed. Assigned opcodes add new high-
power operation and permit new addressing modes.
The instruction set consists of 49 single-byte, 46 two-byte and 16
three-byte instructions. When using a 12MHz oscillator, 64 in-
structions execute in 1us and 45 instructions execute in 2us. Mul-
tiply and divide instructions execute in 4 us.
For the description of the Date Addressing modes and Hexadeci-
mal opcode cross-reference see Boolean variable manipula-
tion,Program brranching.
Arithmatic operations
Mnemonic
ADD A, Rn
ADD A, direct
ADD A, @Ri
ADD A, #data
ADDC A, Rn
ADDC A, direct add direct byte to A with carry flag
ADDC A, @Ri
add indirect RAM to A with carry flag
ADDC A, #data add immediate data to A with carry flag
SUBB A, Rn
subtract register from A with borrow
SUBB A, direct
subtract direct byte from A with borrow
SUBB A, @Ri
subtract indirect RAM from A with borrow
SUBB A, #data
subtract immediate data from A with borrow
INC A
increment A
INC Rn
increment register
INC direct
increment direct byte
INC
@Ri
increment indirect RAM
DEC A
decrement A
DEC Rn
decrement
Rn
DEC direct
decrement direct byte
DEC @Ri
decrement indirect RAM
INC DTPR
increment data pointer
MUL AB
multiply A and B
DIV AB
divide A by B
DA A
decimal adjust A
Description
Bytes
Cycles
1
1
1
1
1
1
1
1
1
1
1
1
1
1
Hex Code
2x
25
26,27
24
3x
35
36,37
34
9x
95
96,97
94
04
0x
add register to A
add direct byte to A
add indirect RAM to A
add immediate data to A
add register to A with carry flag
1
2
1
2
1
2
1
2
1
2
1
1
1
1
1
1
1
2
1
1
1
1
1
1
1
1
1
1
2
4
4
1
06,07
14
1x
15
16,17
A3
A4
84
D4
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