參數(shù)資料
型號: HMS91C7134
英文描述: [Monitor]
中文描述: [顯示器]
文件頁數(shù): 69/86頁
文件大?。?/td> 1508K
代理商: HMS91C7134
HMS91C7134
November.2001 ver1.0
69
Table 19-14 Vsync period low byte register (VPH : 0F3H)
Table 19-15 Hsync period low byte register (HPH : 0F4H)
Table 19-16 Vsync and Hsync period low high register (VHPL : 0F5H)
Table 19-17 Hsync and Vsync generation control register.(HVGEN : 0F9H)
Table 19-18 Description of the HVGEN bits
7
6
5
4
3
2
1
0
VP11
VP10
VP9
VP8
VP7
VP6
VP5
VP4
7
6
5
4
3
2
1
0
HP11
HP10
HP9
HP8
HP7
HP6
HP5
HP4
7
6
5
4
3
2
1
0
VP3
VP2
VP1
VP0
HP3
HP2
HP1
HP0
7
-
6
5
4
3
-
2
1
0
HOPOL
HPG1
HPG0
VOPOL
VPG1
VPG0
BIT
SYMBOL
FUNCTION
6
HOPOL
Select polarity of the horizontal output pulse
0 : positive polarity
1 : negative polarity
7
-
Not used
5 to 4
HPG1
to
HPG0
Horizontal pulse output modes
00 : free running
01 : missing insertion
10 : reserved
11 : the same pulse as the incoming horizontal sync.
Not used
2
VOPOL
Select polarity of the vertical output pulse
0 : positive polarity
1 : negative polarity
1 to 0
VPG1
to
VPG0
Vertical pulse output modes
00 : free running
01 : missing insertion
10 : reserved
11 : the same pulse as the incoming vertical sync.
3
-
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