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參數(shù)資料
| 型號： | HMC700LP4E |
| 廠商： | Hittite Microwave Corporation |
| 文件頁數(shù)： | 6/26頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC FRACT-N PLL 16BIT 24QFN |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 類型： | 整數(shù) N/小數(shù) N 分頻 |
| PLL： | 是 |
| 輸入： | CMOS |
| 輸出： | CMOS |
| 電路數(shù)： | 1 |
| 比率 - 輸入:輸出： | 1:1 |
| 差分 - 輸入:輸出： | 是/無 |
| 頻率 - 最大： | 8GHz |
| 除法器/乘法器： | 是/無 |
| 電源電壓： | 3.3V，5V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 24-VQFN 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 24-QFN 裸露焊盤（4x4） |
| 包裝： | 標(biāo)準(zhǔn)包裝 |
| 其它名稱： | 1127-1064-6 |
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For price, delivery and to place orders: Hittite Microwave Corporation, 2 Elizabeth Drive, Chelmsford, MA 01824
978-250-3343 tel 978-250-3373 fax Order On-line at www.hittite.com
Application Support: apps@hittite.com
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HMC700LP4 / 700LP4E
v11.0411
8 GHz 16-Bit Fractional-N PLL
FSK Modulation
the HMc700LP4(E) is capable of a simple binary Frequency Shift Keying (FSK) modulation. the internal modulation
is unshaped FSK. the loop bandwidth of the synthesizer must be fixed by the user to achieve symbol shaping as
required.
When the FSK mode of operation is enabled, via fsk_enable (table 13), and SEn is held low, the synthesizer will
output binary FSK frequency hops in response to data input on the SDi pin. When SEn is set, the FSK modulation will
stop and return to f0. ScK must not be toggled when transmitting data in FSK mode.
FSK modulation is normally defined by a deviation, Δ, and a modulation rate, m. the deviation is defined as the
difference between the frequency transmitted when input data is 0, 0, and the frequency transmitted when the input
data is 1, 1.
o
is the frequency programmed in the frequency registers as was defined in (EQ 4),
that is:
1
is the fractional frequency achieved by adding the value in the seed register to the
value in the frac register, that is:
Where
Nint
is the integer division ratio, an integer number between 36 and 65,567 (see integer
register)
Nfrac
is the fractional part, a number from 1 to 224
Nseed
is the seed part, a number from 1 to 224
R
is the reference path division ratio
ref
is the frequency of the external reference input
in this case the deviation Δf is given simply by
FSK data bits on SDi will be latched into the synthesizer on the falling edge of the divided reference rate, PFD. if for
example r=1, and ref = 50 MHz, the input FSK data would be oversampled every 20nsec on the falling edge of the
input reference.
the m rate of the FSK data is simply the inverse of twice the period of the data bits. For example, if the data bit period
is 1msec the fm rate is 500 Hz.
if an unshaped binary FSK is desired, the closed loop bandwidth of the synthesizer should be larger than the m
rate by a sufficient margin. For practical FSK transmissions the m rate is limited by the radio link budget, channel
spectral emission restrictions and practical closed loop bandwidths of the fractional synthesizer.
(EQ 7)
(EQ 8)
(EQ 9)
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HMC700LP4ETR | 制造商:Hittite Microwave Corp 功能描述:IC FRACT-N PLL 16BIT 24QFN 制造商:Hittite Microwave Corp 功能描述:HMC700 Series 8 GHz 16-Bit Prescaler Fractional-N PLL - 4x4 mm QFN-24 |
| HMC701LP6C | 制造商:HITTITE 制造商全稱:Hittite Microwave Corporation 功能描述:8 GHz 16-BIT FRACTIONAL-N SYNTHESIZER |
| HMC701LP6C_10 | 制造商:HITTITE 制造商全稱:Hittite Microwave Corporation 功能描述:8 GHz 16-BIT FRACTIONAL-N SYNTHESIZER |
| HMC701LP6CE | 制造商:Hittite Microwave Corp 功能描述:IC SYNTHESIZER W/SWEEPER 40-QFN |
| HMC702LP6CE | 制造商:Hittite Microwave Corp 功能描述:IC SYNTHESIZER W/SWEEPER 40-QFN |
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