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參數(shù)資料
| 型號： | HMC700LP4E |
| 廠商： | Hittite Microwave Corporation |
| 文件頁數(shù)： | 13/26頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC FRACT-N PLL 16BIT 24QFN |
| 標準包裝： | 1 |
| 類型： | 整數(shù) N/小數(shù) N 分頻 |
| PLL： | 是 |
| 輸入： | CMOS |
| 輸出： | CMOS |
| 電路數(shù)： | 1 |
| 比率 - 輸入:輸出： | 1:1 |
| 差分 - 輸入:輸出： | 是/無 |
| 頻率 - 最大： | 8GHz |
| 除法器/乘法器： | 是/無 |
| 電源電壓： | 3.3V，5V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 24-VQFN 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 24-QFN 裸露焊盤（4x4） |
| 包裝： | 標準包裝 |
| 其它名稱： | 1127-1064-6 |
For price, delivery and to place orders: Hittite Microwave Corporation, 2 Elizabeth Drive, Chelmsford, MA 01824
978-250-3343 tel 978-250-3373 fax Order On-line at www.hittite.com
Application Support: apps@hittite.com
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HMC700LP4 / 700LP4E
v11.0411
8 GHz 16-Bit Fractional-N PLL
Table 13. Reg 06h SD CFG Register
Bit
name
Width
Default
Description
[7:0]
reserved
87h
[9:8]
order
2
2h
Select the Modulator type
0 - not used
1 - not used
2 - type B
3 - type a
[10]
frac_rstb
1
0 holds the frac core in reset
reset is used for integer mode or integer mode with cSP
[11]
buff_rstb
1
0 holds the frac core buffers in reset
reset is used with frac_rstb=0 for integer mode, no cSP
[12]
bypass_mode
1
0
1 fractional modulator output is ignored, but fractional modulator
continues to be clocked, used to test the isolation of the
digital fractional modulator from the Vco output in integer
mode
[13]
autoseed_mode
1
loads the seed whenever the frac register is written
[14]
reserved
1
0
Must be kept at 0
[15]
fsk_enable
1
0
enables the FSK mode of operation and FSK input on SDi
pin, (see section FSK Modulation)
[16]
reserved
1
0
[17]
clkrq_refdiv_sel
1
0
selects the SD clock source
1 = reference divider clock
0 = Vco divider clock (recommended)
[18]
clkrq_invert_clk
1
inverts the selected sd clock
[19]
sd_spare_out
1
0
spare
[23:20]
csp_corr_magn
4
8h
cSP magnitude correction (see section cycle Slip Prevention (cSP))
0000 low magnitude
1111 high magnitude
sign of the correction is determined automatically by the cSP state machine
note: to Enable Frac Mode:
Set reg 6 [12:10]= 011
also, reg 9[9:7] or reg 9[4:2] must be adjusted to mitigate spurs in frac mode (Dn or Up Leakage)
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| HMC700LP4ETR | 制造商:Hittite Microwave Corp 功能描述:IC FRACT-N PLL 16BIT 24QFN 制造商:Hittite Microwave Corp 功能描述:HMC700 Series 8 GHz 16-Bit Prescaler Fractional-N PLL - 4x4 mm QFN-24 |
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| HMC701LP6C_10 | 制造商:HITTITE 制造商全稱:Hittite Microwave Corporation 功能描述:8 GHz 16-BIT FRACTIONAL-N SYNTHESIZER |
| HMC701LP6CE | 制造商:Hittite Microwave Corp 功能描述:IC SYNTHESIZER W/SWEEPER 40-QFN |
| HMC702LP6CE | 制造商:Hittite Microwave Corp 功能描述:IC SYNTHESIZER W/SWEEPER 40-QFN |
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